tag: wafer-level packaging

A Hybrid PLP Technology Based On A 650mm x 650mm Platform
By Eoin O'Toole - 25 Jul, 2023 - Comments: 0

A panel-level (PL) approach to fan-out (FO) packaging has been discussed for several years to reduce the cost of chip-first FO packaging based on redistribution layer (RDL) technology. More recently, multilayer high-density chip-last packages have been introduced for more advanced applications. This technology would also benefit from PL processing for cost reduction. Due to the large package di... » read more

A Single-Layer Mechanical Debonding Adhesive For Advanced Wafer-Level Packaging
By Brewer Science - 20 Apr, 2022 - Comments: 0

Better performance and lower cost are always key trends being pursued in the semiconductor industry. Moore's law has provided a very well-defined relationship between performance and cost and the semiconductor industry has followed this law for the past several decades with no issue. However, it became more and more difficult for foundries and integrated device manufacturers (IDMs) to scale to ... » read more

A Novel Multifunctional Single-Layer Adhesive Used For Both Temporary Bonding And Mechanical Debonding in Wafer-Level Packaging Applications
By Brewer Science - 15 Dec, 2021 - Comments: 0

Temporary bonding (TB) and debonding (DB) of wafers have been widely developed and applied over the last decade in various wafer-level packaging technologies, such as package-on-package (PoP), fan-out integration, and 2.5D and 3D integration using through-silicon vias (TSVs). The materials used to achieve TB and DB are extremely critical and the industry's current best practice is the use of tw... » read more

End In Sight For Chip Shortages?
By Mark LaPedus - 18 Nov, 2021 - Comments: 2

The current wave of semiconductor and IC packaging shortages is expected to extend well into 2022, but there are also signs that supply may finally catch up with demand. The same is true for manufacturing capacity, materials and equipment in both the semiconductor and packaging sectors. Nonetheless, after a period of shortages in all segments, the current school of thought is that chip suppl... » read more

Scaling Bump Pitches In Advanced Packaging
By Mark LaPedus - 25 Oct, 2021 - Comments: 0

Interconnects for advanced packaging are at a crossroads as an assortment of new package types are pushing further into the mainstream, with some vendors opting to extend the traditional bump approaches while others roll out new ones to replace them. The goal in all cases is to ensure signal integrity between components in IC packages as the volume of data being processed increases. But as d... » read more

System-In-Package Thrives In The Shadows
By Mark LaPedus - 16 Sep, 2021 - Comments: 0

IC packaging continues to play a big role in the development of new electronic products, particularly with system-in-package (SiP), a successful approach that continues to gain momentum — but mostly under the radar because it adds a competitive edge. With a SiP, several chips and other components are integrated into a package, enabling it to function as an electronic system or sub-system. ... » read more

Fan-Out Packaging Options Grow
By Mark LaPedus - 17 Jun, 2021 - Comments: 0

Chipmakers, OSATs and R&D organizations are developing the next wave of fan-out packages for a range of applications, but sorting out the new options and finding the right solution is proving to be a challenge. Fan-out is a way to assemble one or more dies in an advanced package, enabling chips with better performance and more I/Os for applications like computing, IoT, networking and sma... » read more

Chip Board Interaction Analysis Of 22nm FD-SOI Technology In WLP
By Amkor - 17 Mar, 2021 - Comments: 0

Recently, Wafer Level Packaging (WLP) has been in high demand, especially in mobile device applications as a path to enable miniaturization while maintaining good electrical performance. The relatively inexpensive package cost and simplified supply chain are encouraging other industries to adapt WLP capabilities for radio frequency (RF), communications/sensing (mmWave) and automotive applicatio... » read more

Shortages, Challenges Engulf Packaging Supply Chain
By Mark LaPedus - 18 Feb, 2021 - Comments: 0

A surge in demand for chips is impacting the IC packaging supply chain, causing shortages of select manufacturing capacity, various package types, key components, and equipment. Spot shortages in packaging surfaced in late 2020 and have since spread to other sectors. There are now a variety of choke points in the supply chain. Wirebond and flip-chip capacity will remain tight throughout 2021... » read more

Defect Challenges Grow For IC Packaging
By Mark LaPedus - 22 Oct, 2020 - Comments: 0

Several vendors are ramping up new inspection equipment based on infrared, optical, and X-ray technologies in an effort to reduce defects in current and future IC packages. While all of these technologies are necessary, they also are complementary. No one tool can meet all defect inspection requirements. As a result, packaging vendors may need to buy more and different tools. For years, p... » read more

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