tag: University of California Santa Barbara

Research Bits: Nov. 5
By Jesse Allen - 05 Nov, 2024 - Comments: 0

Optical in-memory computing Researchers from the University of Pittsburgh, University of California Santa Barbara, University of Cagliari, and Institute of Science Tokyo propose a resonance-based photonic architecture which leverages the non-reciprocal phase shift in magneto-optical materials to implement photonic in-memory computing. “The materials we use in developing these cells have b... » read more

Research Bits: July 8
By Liz Allan - 08 Jul, 2024 - Comments: 0

2D TFETS for neuromorphic computing Researchers from the University of California Santa Barbara and Intel Labs used 2D transition metal dichalcogenide (TMD)-based tunnel-field-effect transistors (TFETs) in a neuromorphic computing platform, bringing the energy requirements to within two orders of magnitude (about 100 times) the amount used by the human brain. The 2D TFETs have lower off-sta... » read more

Compilation Challenges Of Scaling Up Quantum Computing With Superconducting Chiplet Architecture
By Technical Paper Link - 21 May, 2024 - Comments: 0

A technical paper titled “MECH: Multi-Entry Communication Highway for Superconducting Quantum Chiplets” was published by researchers at University of California San Diego, University of California Santa Barbara, and Cisco Quantum Lab. Abstract: "Chiplet architecture is an emerging architecture for quantum computing that could significantly increase qubit resources with its great scalabili... » read more

Ultra Energy-Efficient HW Platform For Neuromorphic Computing Enabled By 2D-TMD Tunnel-FETs (UC Santa Barbara)
By Technical Paper Link - 07 May, 2024 - Comments: 0

A technical paper titled “An ultra energy-efficient hardware platform for neuromorphic computing enabled by 2D-TMD tunnel-FETs” was published by researchers at the University of California Santa Barbara. Abstract: "Brain-like energy-efficient computing has remained elusive for neuromorphic (NM) circuits and hardware platform implementations despite decades of research. In this work we rev... » read more

Research Bits: April 23
By Jesse Allen - 23 Apr, 2024 - Comments: 0

Probabilistic computer prototype Researchers at Tohoku University and the University of California Santa Barbara created a prototype of a heterogeneous probabilistic computer that combines a CMOS circuit with a limited number of stochastic nanomagnets. It aims to improve the execution of probabilistic algorithms used to solve problems where uncertainty is inherent or where an exact solution... » read more

Chip Industry’s Technical Paper Roundup: October 9
By Liz Allan - 09 Oct, 2023 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=153 /] More Reading Technical Paper Library home » read more

Noise Parameter Survey Of Millimeter Wave GaN HEMT Technologies
By Technical Paper Link - 03 Oct, 2023 - Comments: 0

A technical paper titled “A Survey of GaN HEMT Technologies for Millimeter-Wave Low Noise Applications” was published by researchers at Wright-Patterson AFB, Teledyne Scientific, HRL Laboratories, BAE Systems, Pseudolithic, Northrop Grumman Corporation, and University of California Santa Barbara. "This article presents a set of measured benchmarks for the noise and gain performance of si... » read more

Chip Industry’s Technical Paper Roundup: June 27
By Liz Allan - 27 Jun, 2023 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=113 /]   » read more

Power/Performance Bits: Sept. 9
By Jesse Allen - 09 Sep, 2020 - Comments: 0

Smaller, cheaper integrated photonics Researchers from the University of California Santa Barbara, California Institute of Technology (Caltech), and Ecole Polytechnique Fédérale de Lausanne (EPFL) developed a way to integrate an optical frequency comb on a silicon photonic chip. Optical frequency combs are collections of equally spaced frequencies of laser light (so called because when pl... » read more

Power/Performance Bits: Aug. 25
By Jesse Allen - 25 Aug, 2020 - Comments: 0

AI architecture optimization Researchers at Rice University, Stanford University, University of California Santa Barbara, and Texas A&M University proposed two complementary methods for optimizing data-centric processing. The first, called TIMELY, is an architecture developed for “processing-in-memory” (PIM). A promising PIM platform is resistive random access memory, or ReRAM. Whil... » read more

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