Chip Industry’s Technical Paper Roundup: October 9

CAN intrusion detection; probabilistic computing in MTJs; logic-locking Trojans; 5nm finFETs; non-volatile memory; SiC MOSFET performance; nano CMOS electronics; GaN HEMT for low noise applications.


New technical papers added to Semiconductor Engineering’s library this week.

Technical Paper Research Organizations
CANShield: Deep Learning-Based Intrusion Detection Framework for Controller Area Networks at the Signal-Level Virginia Tech and others
Probabilistic computing with voltage-controlled dynamics in magnetic tunnel junctions Northwestern University, University of Messina, Western Digital Corporation, and Universitat Jaume I
Logic Locking based Trojans: A Friend Turns Foe University of Maryland and University of Florida
A Comprehensive RF Characterization and Modeling Methodology for the 5nm Technology Node FinFETs IIT Kanpur, MaxLinear Inc., and University of California Berkeley
Novel Non-Volatile Memory Devices and Applications University of California Berkeley
Improved Scheme for Estimating the Embedded Gate Resistance to Reproduce SiC MOSFET Circuit Performance ROHM Company
Shockley-Read-Hall recombination and trap levels in In0.53 Ga0.47 As point defects from first principles University of Glasgow and Synopsys Denmark
A Survey of GaN HEMT Technologies for Millimeter-Wave Low Noise Applications Wright-Patterson AFB, Teledyne Scientific, HRL Laboratories, BAE Systems, Pseudolithic, Northrop Grumman Corporation, and University of California Santa Barbara

More Reading
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