Chip Industry Technical Paper Roundup: Apr. 21


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations Neural Computers 🔗 Meta AI, KAUST Characterizing tip-sample interaction dynamics on EUV nanostructures using AFM with a high-aspect ratio tip 🔗 Purdue University, Intel, Bruker  Photonic chip packaging for extreme environments ὑ... » read more

Photonic Packaging Resistant to Extreme Environments (NIST, Johns Hopkins, U. Of Maryland)


A new technical paper, "Photonic chip packaging for extreme environments" was published by NIST, Johns Hopkins and University of Maryland. Abstract "Integrated photonic sensors have advanced significantly in the past decade for an ever-increasing range of applications, driven by the inherent scalability of integrated photonics combined with the precision of nanofabrication. Robust and rug... » read more

Chip Industry Week In Review


Think tank IAPS' report on AI integrity attacks contends that advanced AI systems must be protected from hidden tampering, backdoors, or unauthorized changes that could alter their behavior or outputs, especially when AI adoption is scaling rapidly, with over 60% of the federal workforce now using AI every day. Geopolitics The U.S. government has drafted new export rules that may give W... » read more

Research Bits: Dec. 2


Ionothermoelectric cooling Researchers from the University of Osaka, University of Tokyo, and Japan's National Institute of Advanced Industrial Science and Technology proposed an ionothermoelectric cooling strategy for chips that enhances cooling by driving the flow of ions through nanoscale channels. “We fabricated a nanosized pore in a semiconductor membrane and surrounded the nanopore ... » read more

Chip Industry Week in Review


Microsoft, OpenAI, and NVIDIA warned about power swings and physical damage to power grids increasing from AI training workloads and jointly proposed a multi-pronged approach to stabilize power in AI training data centers. Meanwhile, Anthropic issued a warning about the weaponization of agentic AI in a new 25-page Threat Intelligence report. Key concerns involve the evolution in AI-assisted ... » read more

Chip Industry Technical Paper Roundup: August 19


New technical papers recently added to Semiconductor Engineering’s library: [table id=465 /] Find more semiconductor research papers here. » read more

Microservice-Based LLM Agents Enable EDA Flow Automation (Duke Univ. and Univ. of Maryland)


A new technical paper titled "AutoEDA: Enabling EDA Flow Automation through Microservice-Based LLM Agents" was published by researchers at Duke University and University of Maryland. Abstract "Modern Electronic Design Automation (EDA) workflows, especially the RTL-to-GDSII flow, require heavily manual scripting and demonstrate a multitude of tool-specific interactions which limits scalabili... » read more

Chip Industry Technical Paper Roundup: July 7


New technical papers recently added to Semiconductor Engineering’s library: [table id=445 /] Find more semiconductor research papers here. » read more

Chip Industry Week in Review


[Editor's Note: Early edition due to the U.S. July 4th holiday.] The U.S. government lifted export restrictions that barred Synopsys, Siemens EDA, and Cadence from selling EDA tools to China. In a statement, Synopsys said it received a letter from the U.S. Commerce Department immediately rescinding those restrictions. Siemens issued a similar statement. Which tools or hardware accelerated t... » read more

Framework To Analyze Threats To The Semiconductor Supply Chain (NIST, U. of Maryland)


A new technical paper titled "Analyzing Collusion Threats in the Semiconductor Supply Chain" was published by researchers at NIST and University of Maryland. Abstract "This work proposes a framework for analyzing threats related to the semiconductor supply chain. The framework introduces a metric that quantifies the severity of different threats subjected to a collusion of adversaries from ... » read more

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