Chip Industry Technical Paper Roundup: July 8

Hot spot cooling; scalable MatMul-free LLM; DfT for 3DIC; photonic ICs; high-density in-memory computing; self-assembly nano; LLM on-chip security verification.


New technical papers recently added to Semiconductor Engineering’s library.

Technical Paper Research Organizations
Thermoelectric active cooling for transient hot spots in microprocessors University of Pittsburgh and Carnegie Mellon University
Scalable MatMul-free Language Modeling UC Santa Cruz, Soochow University, UC Davis, and LuxiTech
SoCureLLM: An LLM-driven Approach for Large-Scale System-on-Chip Security Verification and Policy Generation University of Florida
Design-for-Test Solutions for 3D Integrated Circuits Duke University, Arizona State University, and NVIDIA
Bound-state-in-continuum guided modes in a multilayer electro-optically active photonic integrated circuit platform NIST, University of Maryland, and Theiss Research
Low-Power Charge Trap Flash Memory with MoS2 Channel for High-Density In-Memory Computing Kyungpook National University, Sungkyunkwan University, Dankook University, and Kwangwoon University
Self-assembly of nanocrystal checkerboard patterns via non-specific interactions University of California San Diego and Duke University

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