Chip Industry Week In Review


JEDEC and the Open Compute Project rolled out a new set of guidelines for standardizing chiplet characterization details, such as thermal properties, physical and mechanical requirements, and behavior specs. Those details have been a sticking point for commercial chiplets, because without them it's not possible to choose the best chiplet for a particular application or workload. The guidelines ... » read more

Chip Industry Technical Paper Roundup: May 7


New technical papers added to Semiconductor Engineering’s library this week. [table id=223 /] More ReadingTechnical Paper Library home » read more

Centauri: Practical Rowhammer Fingerprinting Demonstrated On DRAM Modules (UC Davis)


A technical paper titled “Centauri: Practical Rowhammer Fingerprinting” was published by researchers at UC Davis. Abstract: "Fingerprinters leverage the heterogeneity in hardware and software configurations to extract a device fingerprint. Fingerprinting countermeasures attempt to normalize these attributes such that they present a uniform fingerprint across different devices or present d... » read more

Chip Industry’s Technical Paper Roundup: June 27


New technical papers added to Semiconductor Engineering’s library this week. [table id=113 /]   » read more

Protecting Power Management Circuits Against Trojan Attacks


A technical paper titled “Hardware Trojans in Power Conversion Circuits” was published by researchers at UC Davis. Abstract: "This report investigates the potential impact of a Trojan attack on power conversion circuits, specifically a switching signal attack designed to trigger a locking of the pulse width modulation (PWM) signal that goes to a power field-effect transistor (FET). The fi... » read more

Chip Industry’s Technical Paper Roundup: Apr. 4


New technical papers recently added to Semiconductor Engineering’s library: [table id=90 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Using Photonic Band Gap in Triangular SiC Structures for Efficient Quantum Nanophotonic HW


A new technical paper titled "Utilizing photonic band gap in triangular silicon carbide structures for efficient quantum nanophotonic hardware" was published by researchers at UC Davis. Abstract: "Silicon carbide is among the leading quantum information material platforms due to the long spin coherence and single-photon emitting properties of its color center defects. Applications of silico... » read more

Chasing After Carbon Nanotube FETs


Carbon nanotube transistors are finally making progress for potential use in advanced logic chips after nearly a quarter century in R&D. The question now is whether they will move out of the lab and into the fab. Several government agencies, companies, foundries, and universities over the years have been developing, and are now making advancements with carbon nanotube field-effect transi... » read more

Power/Performance Bits: June 21


A chip with 1,000 processors A microchip containing 1,000 independent programmable processors has been designed by a team at the University of California, Davis. Called the KiloCore chip, it contains 621 million transistors and was fabricated by IBM using its 32nm CMOS technology. Cores operate at an average maximum clock frequency of 1.78 GHz, and they transfer data directly to each other r... » read more

Power/Performance Bits: Oct. 13


Cooling down FPGAs Georgia Institute of Technology researchers found a way to put liquid cooling a few hundred microns away from where the transistors are operating by cutting microfluidic passages directly into the backsides of production FPGAs. The research, backed by DARPA, is believed to be the first example of liquid cooling directly on an operating high-performance CMOS chip. To ... » read more

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