Machine Intelligence on Wireless Edge Networks with RF Analog Architecture (MIT, Duke)


A new technical paper titled "Machine Intelligence on Wireless Edge Networks" was published by researchers at MIT and Duke University. Abstract "Deep neural network (DNN) inference on power-constrained edge devices is bottlenecked by costly weight storage and data movement. We introduce MIWEN, a radio-frequency (RF) analog architecture that "disaggregates" memory by streaming weights wirele... » read more

Chip Industry Technical Paper Roundup: Apr. 7


New technical papers recently added to Semiconductor Engineering’s library: [table id=419 /] Find more semiconductor research papers here. » read more

Study Of Multi-Die And Multi-Technology Floorplanning (Texas A&M, Duke)


A new technical paper titled "PPAC Driven Multi-die and Multi-technology Floorplanning" was published by Texas A&M University and Duke University. Abstract "In heterogeneous integration, where different dies may utilize distinct technologies, floorplanning across multiple dies inherently requires simultaneous technology selection. This work presents the first systematic study of multi-die ... » read more

Chip Industry Technical Paper Roundup: Apr. 1


New technical papers recently added to Semiconductor Engineering’s library: [table id=416 /] Find more semiconductor research papers here. » read more

Evaluation Tool For The Cost Impacts Of Chiplet-Specific Design Choices


A new technical paper titled "CATCH: a Cost Analysis Tool for Co-optimization of chiplet-based Heterogeneous systems" was published by researchers at UCLA, Duke University and Arizona State University. Abstract "With the increasing prevalence of chiplet systems in high-performance computing applications, the number of design options has increased dramatically. Instead of chips defaulting to... » read more

Chip Industry Week In Review


Chinese startup DeepSeek rattled the tech world and U.S. stock market with claims it spent just $5.6 million on compute power for its AI model compared to its billion-dollar rivals in the U.S. The announcement raised questions about U.S. investment strategies in AI infrastructure and led to an initial $600 billion selloff of NVIDIA stock. Since its launch, DeepSeek reportedly was hit by malicio... » read more

Survey: HW SW Co-Design Approaches Tailored to LLMs


A new technical paper titled "A Survey: Collaborative Hardware and Software Design in the Era of Large Language Models" was published by researchers at Duke University and Johns Hopkins University. Abstract "The rapid development of large language models (LLMs) has significantly transformed the field of artificial intelligence, demonstrating remarkable capabilities in natural language proce... » read more

Chip Industry Technical Paper Roundup: July 8


New technical papers recently added to Semiconductor Engineering’s library. [table id=238 /] More ReadingTechnical Paper Library home » read more

Chip Industry Week In Review


The Design Automation Conference morphed into the Chips to Systems Conference, reflecting an industry shift from monolithic SoCs to assemblies of chiplets in various flavors of advanced packaging. The change drew a slew of students and a resurgent buzz, fueled by discussions about heterogeneous integration, reliability, and ways to leverage AI/ML to speed up design and verification processes. ... » read more

Overview of Test Strategies for 3DICs


A new technical paper titled "Design-for-Test Solutions for 3D Integrated Circuits" was published by researchers at Duke University, Arizona State University, and NVIDIA. Abstract: "As Moore's Law approaches its limits, 3D integrated circuits (ICs) have emerged as promising alternatives to conventional scaling methodologies. However, the benefits of 3D integration in terms of lower power co... » read more

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