中文 English

Energy-efficient Non Uniform Last Level Caches for Chip-multiprocessors Based on Compression


Abstract "With technology scaling, the size of cache systems in chip-multiprocessors (CMPs) has been dramatically increased to efficiently store and manipulate a large amount of data in future applications and decrease the gap between cores and off-chip memory accesses. For future CMPs architecting, 3D stacking of LLCs has been recently introduced as a new methodology to combat to performance ... » read more

Power/Performance Bits: Feb. 26


Integrated RRAM for edge AI Researchers at CEA-Leti and Stanford University have developed the first circuit integrating multiple-bit non-volatile Resistive RAM (RRAM) with silicon computing units, as well as new memory resiliency features that provide 2.3-times the capacity of existing RRAM. The proof-of-concept chip monolithically integrates two heterogeneous technologies: 18KB of on-chip... » read more

Power/Performance Bits: Nov. 21


Greener greenhouses Researchers at the University of California, Santa Cruz are testing greenhouses capable of generating some of their own energy, without hampering plant growth. Greenhouses use electricity to control temperature and power fans, lights, and other monitoring systems. Electricity-generating solar greenhouses utilize Wavelength-Selective Photovoltaic Systems (WSPVs), a novel ... » read more