Surface Modification for III-V Selective Area MBE of Non-Selective Mask Materials (UT Austin, Harvard)


Researchers from University of Texas at Austin and Harvard University published “Surface Modification for III-V Selective Area Molecular Beam Epitaxy of Non-Selective Mask Materials”. Abstract Excerpt “Selective-area embedded regrowth of III-V semiconductors by molecular beam epitaxy enables the seamless integration of metals and dielectrics into crystalline material for novel... » read more

Research Bits: Jun. 2


Integrated valleytronics device Researchers from Monash University designed a valleytronics circuit that can generate, direct, and read light-based information on a single chip. Potential applications include quantum computing, advanced imaging, and optical communication systems. “We employ a straightforward stacking approach to integrate ultrathin materials with metasurfaces, overcoming ... » read more

Chip Industry Technical Paper Roundup: Jan 6


New technical papers recently added to Semiconductor Engineering’s library: [table id=510 /] Find more semiconductor research papers here. » read more

Scalable AI/ML Method For Improved MTJ Performance (UT Austin, TSMC, TDK Headway)


A new technical paper titled "LEAD: Literature Enhanced Ab Initio Discovery of Nitride Dusting Layers for Enhanced Tunnel Magnetoresistance and Lower Resistance Magnetic Tunnel Junctions" was published by researchers at University of Texas at Austin, TSMC, and TDK Headway Technologies Inc. Abstract "Magnetic tunnel junctions (MTJs) using magnesium oxide (MgO) tunnel barriers face challenges... » read more

Chip Industry Week in Review


Deals of the week: Arteris announced plans to acquire cybersecurity provider Cycuity. “Expanding our technology portfolio to include Cycuity’s hardware security assurance products will enable our customers to achieve secure on-chip data movement,” said Charlie Janac, chairman and CEO of Arteris. Qualcomm acquired Ventana Micro Systems, a maker of RISC-V data center-class CPU IP. ... » read more

Chip Industry Technical Paper Roundup: Oct. 21


New technical papers recently added to Semiconductor Engineering’s library: [table id=484 /] Find more semiconductor research papers here. » read more

Beyond BPD: Backside Clock and Signal Routing for Sub-3nm (UT Austin, Intel)


A new technical paper titled "Beyond Backside Power: Backside Signal Routing as Technology Booster for Standard Cell Scaling" was published by researchers from University of Texas at Austin and Intel. Abstract "Advances in process technology enabling backside metals and contacts offer new Design-Technology Co-Optimization (DTCO) opportunities to further enhance power, performance, and area ... » read more

Chip Industry Week in Review


SEMICON West was held in Phoenix this week, with presentations covering heterogeneous integration, AI, quantum, supply chain resilience, and more. Amid the buzz of the conference, some key manufacturing and test announcements were made this week: The strategic importance of the Phoenix area hub was highlighted. Amkor Technology broke ground this week on its advanced packaging and test camp... » read more

Many Options For EUV Photoresists, No Clear Winner


In EUV lithography, and especially high-numerical-aperture EUV, balancing tradeoffs between resolution, sensitivity and line-width roughness is becoming increasingly difficult. Lithography patterning using extreme UV exposure depends on a resist mask that can simultaneously meet targets of small feature resolution, high sensitivity to EUV wavelength, and acceptable linewidth roughness. Unfor... » read more

Research Bits: Dec. 3


Self-assembly of mixed-metal oxide arrays Researchers from North Carolina State University and Iowa State University demonstrated a technique for self-assembling electronic devices. The proof-of-concept work was used to create diodes and transistors with high yield and could be used for more complex electronic devices. “Our self-assembling approach is significantly faster and less expensi... » read more

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