Bug-Free Designs

By Brian Bailey - 27 Oct, 2022 - Comments: 0

It is possible in theory to create a design with no bugs, but it's impractical, unnecessary, and extremely difficult to prove for bugs you care about. The problem is intractable because the potential state space is enormous for any practical design. The industry has devised ways to handle this complexity, but each has limitations, makes assumptions, and employs techniques that abstract the p... » read more

Verification Scorecard: How Well Is The Industry Doing?

By Brian Bailey - 25 Aug, 2022 - Comments: 0

Semiconductor Engineering sat down to discuss how well verification tools and methodologies have been keeping up with demand, with Larry Lapides, vice president of sales for Imperas Software; Mike Thompson, director of engineering for the verification task group at OpenHW; Paul Graykowski, technical marketing manager for Arteris IP; Shantanu Ganguly, vice president of product marketing at Caden... » read more

Who Does Processor Validation?

By Brian Bailey - 27 Jun, 2022 - Comments: 1

Defining what a processor is, and what it is supposed to do, is not always as easy as it sounds. In fact, companies are struggling with the implications of hundreds of heterogenous processing elements crammed into a single chip or package. Companies have extensive verification methodologies, but not for validation. Verification is a process of ensuring that an implementation matches a specif... » read more

Verification And Validation Of Automotive Safety Element Out Of Context

By Synopsys - 01 Jun, 2022 - Comments: 0

With the increased use of electronics and software in the automotive systems, there are strict requirements for complex functions to perform safely and avoid causing damages to life and property in case of a failure. With the technology getting more complex, there are increasing risks from systematic failures and random hardware failures that need to be considered within the scope of functional... » read more

Traceability, Unfamiliar But Critical

By Paul Graykowski - 06 Jan, 2022 - Comments: 0

Many understand that traceability is a popular concept. Still, understanding traceability in detail is more challenging, especially in how it connects to familiar objectives in the semiconductor design space. A simple way to understand is this: When a customer (call them C) asks a semiconductor supplier (call them S) to build a device to meet a system objective, they provide S with specificatio... » read more

NeuroSim Simulator for Compute-in-Memory Hardware Accelerator: Validation and Benchmark

By Technical Paper Link - 20 Dec, 2021 - Comments: 0

Abstract: "Compute-in-memory (CIM) is an attractive solution to process the extensive workloads of multiply-and-accumulate (MAC) operations in deep neural network (DNN) hardware accelerators. A simulator with options of various mainstream and emerging memory technologies, architectures, and networks can be a great convenience for fast early-stage design space exploration of CIM hardw... » read more

Netlist Decompilation Workflow for Recovered Design Verification, Validation, and Assurance

By Technical Paper Link - 12 Nov, 2021 - Comments: 0

Abstract: "Over the last few decades, the cost and difficulty of producing integrated circuits at ever shrinking node sizes has vastly increased, resulting in the manufacturing sector moving overseas. Using offshore foundries for chip fabrication, however, introduces new vulnerabilities into the design flow since there is little to no observability into the manufacturing process. At the same ... » read more

FPGA Prototyping: Supersizing Scale And Performance

By Synopsys - 11 May, 2021 - Comments: 0

Given the cost of re-spinning a system-on-chip (SoC), semiconductor companies have always looked for ways to verify and validate the SoC before tape-out. Prototyping using field programmable gate arrays (FPGAs) became a key methodology as part of this pre-silicon verification and validation effort. Click here to read more. » read more

Advancing IC And Systems Design With The Digital Twin

By Joseph Sawicki - 25 Feb, 2021 - Comments: 0

As many of you may have seen, we’ve passed a major milestone since Siemens announced its intent to acquire Mentor Graphics four years ago. As of January 1, 2021, “Mentor, a Siemens business” has become “Siemens EDA” and remains a segment of the larger Siemens Digital Industries Software organization. Siemens is bringing together one of the world’s most comprehensive EDA portfolios w... » read more

Confusion Persists In Verification Terms

By Brian Bailey - 27 Aug, 2020 - Comments: 7

I find it amazing that an area of technology that attempts to show, beyond a reasonable doubt, that a design will work before it is constructed can be so bad at getting some basic things right. I am talking about verification terminology. I have been in this industry for over 40 years and it is not improving. In fact, it is getting worse. The number of calls I have with people where they hav... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?