Capturing Bugs Visually

By Vtool - 24 Apr, 2020 - Comments: 0

This paper presents a new way to comprehend complex scenarios, in order to significantly accelerate bug detection and resolution. By defining a new visual language, which creates interaction vertices between the simulation scenarios and the code structure on a single matrix, we offer a novel way to compare multiple cycles. It enables verification engineers to reach solid conclusions regarding a... » read more

August 2019 Startup Funding Report

By Jeff Dorsch - 09 Sep, 2019 - Comments: 0

Last month, 18 startups received private funding rounds of $100 million or more. Software and cybersecurity startups were once again popular, while automotive, mobility, artificial intelligence/machine learning, and agriculture-related technology also saw a good deal of funding. Analytics, energy, Internet of Things, and robotics startups drew new funding, too. Those 18 companies together to... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 06 Mar, 2015 - Comments: 0

EUV lithography remains a mixed bag, according to analysts. "We are downgrading shares of ASML to 'Sector Perform' from 'Outperform' as we think shares appear fully valued based on midterm lithography demand and our view that meaningful EUV adoption is still several years out," said Weston Twigg, an analyst with Pacific Crest Securities, in a new report. "We think the reality is that it is not ... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Vertex

Capturing Bugs Visually

August 2019 Startup Funding Report

The Week In Review: Manufacturing