Requirements For Datacenter-Ready Emulation

By Frank Schirrmeister - 29 Oct, 2015 - Comments: 0

It’s time to look at what the latest trends in emulation are and to review some of the key requirements to make it datacenter-ready. Specifically, I will look at virtualization of external interfaces as well as emulation throughput, specifically the allocation of jobs into emulators. One overarching trend in verification lies in the connection of the engines in what Jim Hogan has dubbed t... » read more

Data Centers At Risk

By Ed Sperling - 06 Jul, 2015 - Comments: 0

Large companies have been utilizing private clouds for the past half-decade as a way to safeguard their data and still take advantage of outsourcing economics. Using that approach, the data center has become an in-house service provider with its own P&L, which is why there has been such a push to improve efficiency well beyond the server consolidation that was made possible with virtualization.... » read more

More Data, Different Approaches

By Ed Sperling - 25 Jun, 2015 - Comments: 0

Scaling, rising complexity, and integration are all contributing to an explosion in data, from initial design to physical layout to verification and into the manufacturing phase. Now the question is what to do with all of that data. For SoC designs, that data is critical for identifying real and potential problems. It also allows verification engineers working the back end of the design flow... » read more

EDA’s Clouded Future

By Brian Bailey - 25 Jun, 2015 - Comments: 0

There was a time, not that long ago, when chip design and EDA tools consumed some of the largest data centers with tens of thousands of machines and single datasets that consumed more than a hard disk could hold. The existing IT capabilities of the times were stretched to their limits. But while design sizes grew, other aspects of the flow did not develop as fast. “This has been driven by ... » read more

One-on-One: Smarter Architectures

By Ed Sperling - 02 Apr, 2015 - Comments: 0

Edward Lee, distinguished professor of electrical engineering and computer science professor at the [getentity id="22165" comment="UC Berkeley"], sat down with Semiconductor Engineering to talk about what is needed to maximize the usefulness of the [getkc id="76" comment="Internet of Things"] and how our perceptions need to shift to take advantage of this technology. What follows are excerpts o... » read more

One-On-One: Mike Muller

By Ed Sperling - 08 Oct, 2014 - Comments: 0

Semiconductor Engineering sat down with [getentity id="22186" comment="ARM"] CTO Mike Muller, who first coined the term 'dark silicon,' to talk about what's changing, why the company is focusing so heavily on software and security in addition to power, and how the [getkc id="76" comment="Internet of Things"] will change design and vice versa. What follows are excerpts of that conversation. S... » read more

Blog Review: April 2

By Ed Sperling - 02 Apr, 2014 - Comments: 0

Mentor’s Nazita Saye compares roadway roundabouts to networked systems. One roundabout works fine, but add in a bunch of them and you have a massive traffic jam. How many roundabouts are in your design? Cadence’s Richard Goering interviews Stan Kroliskoski, chair of the IEEE Design Automation Standards Committee, about four working groups on EDA standards and what’s ahead. Speaking ... » read more

Are Processors Running Out Of Steam?

By Ed Sperling - 24 Feb, 2014 - Comments: 1

Check out any smart phone these days and you’ll find some reference to the number of cores in the device. It’s not the number of cores that makes a difference, though—or even the clock speed at which they run. Performance depends on the underlying design for how they’re utilized, how often that happens, how much memory they share, how much interaction there is between the cores, and the... » read more

The Next Big Threat: System Security

By Ed Sperling - 31 Jan, 2014 - Comments: 0

No SoC ever will be totally secure, and no technology will stop experienced thieves who really want to get into a device. But chipmakers and IP companies are examining ways to at least make it more difficult—and at least in theory, far less lucrative. One big change, of course, is that a connected electronic ecosystem has made location irrelevant. In the past, crime was limited to where th... » read more

Experts At The Table: Latency

By Ed Sperling - 01 Feb, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance engineering sat down to discuss latency with Chris Rowen, CTO at Tensilica; Andrew Caples, senior product manager for Nucleus in Mentor Graphics’ Embedded Software Division; Drew Wingard, CTO at Sonics; Larry Hudepohl, vice president of hardware engineering at MIPS; and Barry Pangrle, senior power methodology engineer at Nvidia. What follows are exce... » read more

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Knowledge Centers
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The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

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Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

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tag: virtualization