Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 21 May, 2021 - Comments: 0

Pervasive computing — IoT, edge, cloud, data center, and back Combining AI with IoT not only gives another acronym AIoT, or Artificial Intelligence of Things, but it puts AI systems on the edge. Infineon Technologies has released its ModusToolbox Machine Learning to make it possible to run deep learning-based workloads on Infineon’s PSoC microcontrollers. The toolbox has middleware, softwa... » read more

Blog Review: Jan. 17

By Jesse Allen - 17 Jan, 2018 - Comments: 0

Mentor's Puneet Sinha identifies the key challenges, along with cost reduction and optimization opportunities, that come with using electric powertrains in autonomous vehicles. Synopsys' Robert Vamosi examines the impact of limited cellular networks on autonomous cars, and new communications protocols that could address coverage gaps. Cadence's Paul McLellan listens in as Lucian Shifren o... » read more

Blog Review: Jan. 3

By Jesse Allen - 03 Jan, 2018 - Comments: 0

Ansys' Steve Pytel argues that increased signaling speeds and frequencies have led to signal integrity issues that circuit simulation alone cannot handle. Cadence's Paul McLellan dives into the details of Intel's 10nm process, including three layers of self-aligned quadruple patterning, contact-over-active-gate, and cobalt for contact fill. Mentor's Ron Press and Vidya Neerkundar argue th... » read more

Blog Review: Dec. 13

By Jesse Allen - 13 Dec, 2017 - Comments: 0

Mentor's Sherif Hany notes that pattern matching isn't just for litho hotspots anymore, and is increasingly being used in a wide range of early design phase checks, DRC flows, layout retargeting and fixing and DFM checks. Synopsys' Eric Huang explains why USB cables have gotten so short, even though no length is mentioned in the specification. Cadence's Paul McLellan listens in as Jeremy ... » read more

Blog Review: Nov. 8

By Jesse Allen - 08 Nov, 2017 - Comments: 0

Synopsys' Eric Huang digs in to what's new with USB 3.2 and what's achieved by preserving the existing PHY signaling speeds. In a video, Mentor's Colin Walls provides tips on how to write debuggable and maintainable embedded code. Cadence's Paul McLellan listens in on a talk by Andrew Kahng of UC San Diego on the problem of scaling and why machine learning can improve EDA tools. Rambus... » read more

Blog Review: Sept. 20

By Jesse Allen - 20 Sep, 2017 - Comments: 0

Mentor's Jeff Miller warns that MEMS accelerometers are vulnerable to takeover using specially constructed sound waves, as demonstrated in a new paper. Synopsys' Pooja Gupta and Srinivas Vijayaragavan explain some major technology updates in SAS 24G with a look at Binary primitives, Extended Binary primitives and primitive parameters. Cadence's Paul McLellan shares highlights from TSMC's ... » read more

Blog Review: Aug. 23

By Jesse Allen - 23 Aug, 2017 - Comments: 0

Cadence's Madhavi Rao asks whether India should have more fabs and the role government policy should play. Synopsys' Kapil Rajpal checks out the Serial Peripheral Interface, which is emerging as a popular choice in automotive applications, and various vendor specific flavors. In a video, Mentor's Colin Walls explains inter-task communication and the basic mechanisms of how to pass data fr... » read more

Blog Review: Aug. 9

By Jesse Allen - 09 Aug, 2017 - Comments: 0

Cadence's Paul McLellan digs into a recently discovered vulnerability in the Broadcom Wi-Fi chip used in many smartphones and why it should be a wakeup call for SoC designers. Mentor's Craig Armenti considers whether work-in-process design data management is an asset or a liability. Synopsys' Thomas M. Tuerke notes that in code, as in medicine, proper hygiene is should be treated as a con... » read more

Blog Review: June 28

By Jesse Allen - 28 Jun, 2017 - Comments: 0

Mentor's Craig Armenti notes the benefits, and challenges, of investing in modular design in the PCB domain. Cadence's Paul McLellan covers a DAC chat with CEO Lip-Bu Tan on the rise of advanced packaging and investments in AI and autonomous driving. Synopsys' Jim Hartnett examines some of the challenges and tradeoffs involved in building good security practices in hospital environments. ... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.