中文 English

Innovative Dual Mark Design For Alignment Verification And Process Monitoring In Advanced Lithography


Improving on product overlay is one of the key challenges when shrinking technology nodes in semiconductor manufacturing. . . . With smart placement of alignment mark pairs in the X and Y direction, it is possible to determine intra-wafer distortion wafer-by-wafer. Both the measurement and modeled results are applied directly as a feed-forward correction to enable wafer level control. In this p... » read more

Improving Wafer-Level S-Parameters Measurement Accuracy And Stability With Probe-Tip Power Calibration Up To 110 GHz For 5G Applications


Author: Choon Beng Sia, FormFactor Inc., Singapore Demands for mission critical wireless services such as autonomous driving and telehealth require higher data transfer rates and lower latencies. Such applications are now driving the use of radio frequencies (RF) at 28, 38, 60 and 73 GHz for the emerging 5G mobile communication systems. Waferlevel RF measurements of devices or circuits for 5... » read more