The Week In Review: Design

Ansys-Apache unveils power sign off tool for the finFET generation; Synopsys optimizes processor for sound; Accellera rolls out verification libraries; ARM wins deal with Chinese game developer; Synopsys joins hands with Freescale on automotive; DAC announces Pistilli award winner.


Ansys-Apache rolled out a new version of its power noise and reliability tool for finFET-based designs. Given the fact that dynamic power is going to be a massive headache at 14/16nm and beyond due to much greater density, this is a first step in dealing with it. This is just the beginning of a massive effort by EDA to retool for finFETs and the 2.5D/3D architectures.

Synopsys rolled out an optimized decoder for its ARC processors for DTS 5.1-channel audio formats. This is like 3D texture for sound.

Accellera rolled out core language and verification libraries for SystemC. The new 2.3.1 proof of concept library is an update to the standard released in 2011, adding verification extensions compatible with IEEE 1666-2011. A big round of applause for the people who worked on this standard.

ARM struck a deal with Chinese game developer Chukong Technologies, which will optimize its games for ARM-based devices.

Synopsys created a center of excellence with Freescale to speed up development of automotive software. The companies plan to create virtual prototype development kits for Freescale’s microcontrollers.

DAC chose Diana Marculescu, professor of electrical and computer engineering at Carnegie Mellon, to receive the Marie R. Pistilli Women in EDA award for 2014. This is a big deal in many respects — women in engineering, people inspiring young engineers to join a graying work force, and the combination of electrical and computer engineering.

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