The Week In Review: Design

Energy processing IP; security processors; FPGA library reuse; MPEG-H and Dolby AC-4 decoders; simulation software for startups.



Sonics unveiled Energy Processing Unit (EPU) IP, based on the company’s ICE-Grain power architecture, to better manage and control circuit idle time. The IP facilitates design of SoC power architecture and implementation and verification of the resulting power management subsystem.

Synopsys debuted ARC SEM security processors with timing and power randomization features to protect against side-channel attacks on high-value targets such as smart metering, NFC payment and embedded SIM applications. The processors are based on the scalable, 32-bit ARCv2 instruction set architecture and includes separate secure and non-secure functions as part of a Trusted Execution Environment.

Toshiba’s Storage & Electronic Devices Solutions Company uncorked a method for reuse of design assets required to develop large scale custom SoCs with FPGA prototyping, using the company’s wrapper logic to switch between FPGA-specific prototyping libraries and SoC implementation. Third party IPs supported include 10 Gigabit Ethernet (MorethanIP), PCI Express 8 3.0/2.1/1.1 (Northwest Logic), DDR3 SDRAM controller (Northwest Logic). The line-up is being expanded to cover additional solutions.

Cadence brought two updates to its Tensilica HiFi DSPs: a new MPEG-H Audio decoder as well as Dolby Laboratories’ AC-4 Decoder. Both technologies are expected to be widely adopted in the next generation of TVs. The Dolby AC-4 Decoder is delivered with the Dolby MS12 Multistream Decoder, which provides compatibility with existing home theater systems and includes Dolby Audio Processing. MPEG-H Audio will be the first next-generation audio system to be used for over-the-air TV broadcasting when Korea launches their new ATSC 3.0 transmission standard early next year.


Ansys launched a program to provide startups with its engineering simulation software suite. The program will be “virtually free,” according to the company.


The MIPI Alliance announced a forthcoming specification for touch interfaces, and is seeking manufacturers and OS providers to contribute to the first draft, scheduled for completion in 2017. The task will be shared by the MIPI Display Working Group, which is specifying the MIPI Touch specification, and the MIPI Software Working Group, which is investigating the architecture of a supporting software framework.


Kyocera Document Solutions licensed Arteris’ FlexNoC interconnect IP for use in custom systems-on-chip that power its enterprise document imaging and management products, citing ease of implementing traffic scenarios and quality of service.

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