The Week In Review: Design/IoT

Rambus adds mobile payments & smart ticketing; embedded multicore; UPF 3.0, parasitic extraction, and more from Synopsys; Rambus financials.


Mergers & Acquisitions

Rambus expanded the scope of its Cryptography Research Division with the acquisition of UK-based Smart Card Software. The £64.7M ($91.84 million) deal comprises advanced mobile payment platform developer Bell ID as well as Ecebs, a supplier of smart ticketing systems to the UK transport markets.

Tools & IP

Mentor Graphics uncorked its Embedded Multicore Framework, the first commercial implementation of the OpenAMP standard established by the Multicore Association. The specification creates a standardized API for communication and synchronization between homogeneous and heterogeneous multicore embedded systems.

ANSYS rolled out release 17.0 of its simulation tool, offering 10X performance improvement so engineers can make decisions earlier in the design cycle. Included are automated thermal analysis and integrated structural analysis. The company is positioning it as an essential part of IoT design.

Synopsys updated its Platform Architect virtual prototyping solution to be the first to support the new IEEE 1801-2015 UPF 3.0 system-level IP power modeling standard and enables the addition of power analysis to existing architecture performance models without modification. The latest version of Synopsys’s parasitic extraction and signoff tool also launched, with architectural improvements to yield a 2X speedup and a significant boost in multi-core processing scalability.

On the IP front, Synopsys launched a USB Type-C IP solution that includes USB-C 3.1/DisplayPort 1.3 PHYs, USB-C 3.1/DisplayPort 1.3 controllers with HDCP 2.2 content protection, and verification IP. It also introduced an integrated, pre-verified hardware and software IP subsystem optimized for efficient DSP performance which includes a choice of a variety of DesignWare ARC processors.


Kandou Bus fully tested and characterized a 28nm high-speed SerDes PHY IP design that was implemented using the Cadence mixed-signal signoff flow. Silicon results confirm that the design can deliver up to 25Gbps per data bus bit, for a throughput of 125Gbps over the interface.

AMD extended a license agreement for Rambus’ integrated circuit and circuit board products for an additional five years.


Rambus reported fourth quarter results with revenues of $76.8 million, up 7% from the same period last year and up 4% from Q3 2015. For the whole of 2015 revenues stood at $296.3 million, nearly the same as the year before. Diluted net income per share for the year was $1.80 as compared to a diluted net income per share of $0.22 for 2014.

Leave a Reply

(Note: This name will be displayed publicly)