10nm heads into full swing, with 7nm and 5nm on the horizon.
TSMC’s financial results for the 4th Quarter of 2016 were released on January 11, 2017 (PST) and showed that year-over-year fourth quarter revenue increased 28.8% and simultaneously net income and diluted EPS both increased 37.6%. In U.S. dollars, TSMC’s fourth quarter revenue was $8.25 billion. TSMC’s CFO, Ms. Lora Ho, reported that 2016 was a good year for TSMC and that the company set new records in terms of revenue and earnings. Revenue grew 12.4% year-over-year to $29.4 billion for 2016 and wafer shipments increased across nearly all of TSMC’s technology nodes.
Figure 1. Percent Wafer Revenue Per Technology Ramp From Introduction
Figure 1 shows in red the continued ramp of the 20/16nm process line in terms of revenue. After a very quick start, it has fallen back to more historical norms for new technology nodes and now some 11 quarters out after the first release of 20nm, it’s above 30% of TSMC’s total wafer revenue. The fact that 20nm and 16nm use planar and FinFET devices respectively, somewhat clouds this situation though. Nonetheless, even if one assumes that most of the revenue is coming from 16nm, and we’re using the 20nm launch date as the start, the ramp still looks pretty good compared to historical TSMC norms.
Figure 2. Percent Wafer Revenue Per Technology Node Over Last 10 Years
Figure 2 shows how after reaching a number of quarters of ~30% or higher wafer revenue contribution, 28nm finally ceded the revenue generating lead to 20/16nm in the second half of 2016. No doubt while the relatively quick intro of 20nm after the introduction of 28nm likely helped to get 16nm to market faster, it doesn’t look like the quick intro of 20nm hurt the revenue success of 28nm.
Analyst Mehdi Hosseini from Susquehanna Financial Group asked about market share for 10nm. TSMC Chairman, Morris Chang, said that last year he vowed that “every new node from now on we have a market share higher than our market share on 16. “ Mr. Hosseini asked for clarification, if that meant greater than 65%? Chairman Chang answered, very definitely, very definitely, so TSMC seems quite confident that it’s going to capture significant majority share of the foundry market at 10nm and beyond.
Analyst Steven Pelayo from HSBC asked when TSMC expected 10nm to reach 10% of the wafer revenue. Lora Ho said that the big volume will come in the 2nd half of 2017 and that for the year 10nm wafer revenue will exceed 10% of TSMC wafer revenue. The 10nm node should exceed 10% of wafer revenue starting in the third quarter of 2017. This would seem to set up a quick ramp again, very much like the one that we saw for 20nm.
TSMC President and Co-CEO, Mark Liu, commented that 7nm is under qualification now and it will be qualified according to plan from the end of the first quarter of 2017. There are already more than 20 customers design-in on 7nm and this year alone TSMC estimates that there will already be 15 to 20 tapeouts. TSMC seemed confident that no other competitor is currently getting to the same stage of this leading edge technology.
Mark Liu also mentioned last time that TSMC will have 5nm two years from now, that it will be a full node shrink and that it will compete well with any technology that’s out at that time. A recent EETimes article also quoted TSMC as saying that 7nm will ramp in 2017 followed by a 5nm ramp in 2019. Liu also added that TSMC will maintain its 7nm competitiveness just like they are doing on 28 and 16. There are plans for the second year of 7nm production to introduce EUV insertion. The claim is that this can greatly simplify the process without increasing the cost. If customers can take advantage of minor design changes it can increase their density and reduce their die cost, Liu said. The hope is to use this second-year technology to prepare for the EUV production experience for the full-fledged EUV technology on 5nm thus easing their customers transition from TSMC’s 7 to 5 nanometer technology.
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I work at an Micro-electronic Assembly Operation (Flip Chip and WireBond Services). I am interested if the graph “Percent Wafer Revenue vs. Calendar Quarter” could be modified to show the volume of each wafer over time? In other words, replace Revenue with “Wafer Quantity” for each node. That would be of interest for an assembly operation.
wouldn’t that involve TSMC divulging how much they charge per wafer? not likely!