Verifying Security Aspects Of SoC Designs

Verifying the robustness of secure data access and the absence of functional paths touching secure areas.


This paper presents Jasper technology and methodology to verify the robustness of secure data access and the absence of functional paths touching secure areas of a design. Recently, we have seen an increasing demand in industrial hardware design to verify security information. Complex system-on-chips, such as those for cell phones, game consoles, and servers contain secure information. And it is likely that the presence of this information makes providers vulnerable to unauthorized access to secure data. The potential business loss, direct and indirect, is large, and verifying whether the secure information can be leaked is hard to achieve with conventional RTL validation methods. The security requirements are not easily expressible by regular SVA assertions; therefore, it is not practical to achieve validation with standard formal verification tools. Jasper’s Security Path Verification App (SPV) is part of a wide spectrum of apps we provide for design and verification domains. SPV provides a comprehensive solution to the security path verification problem. With SPV, it is convenient to specify the security paths and perform an exhaustive verification based on our special path sensitization technology, automatic connectivity abstraction, path divide-and-conquer search, and by leveraging the comprehensive core formal engines and usability features of the JasperGold platform. Jasper security path verification has been successfully used by various customers in the SoC domain, confirming the impact of Jasper’s solution and technology roadmap.

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