A hands-on, how-to guide about options and what can go wrong.
Designers working with advanced process technologies that require double patterning often find themselves puzzling over the best way to setup or optimize their design flows to ensure their layouts can be decomposed without time-wasting mistakes. Because manual coloring can be challenging even for experienced engineers, many prefer to use automated coloring solutions. But when is the best time and what is the best way to use such tools? In this video, I’ll explore the options available to designers, and explain why you might want to choose one approach over another. Armed with this knowledge, you’ll be better prepared to make the choice that is right for your organization.
Need help debugging DP errors? Check out our white paper, When Order Matters—How to Maximize the Efficiency of DP Error Debugging, to learn how to reduce the time you spend analyzing and fixing DP errors.
The more compute power, the better. But what’s the best way to get there?
Yield rises with mask protection; multiple sources will likely reduce costs.
More heterogeneous designs and packaging options add challenges across the supply chain, from design to manufacturing and into the field.
CNTs promise big performance improvements, but achieving consistency and replacing incumbent technologies will be difficult.
Computational storage approaches push power and latency tradeoffs.
Gate-all-around FETs will replace finFETs, but the transition will be costly and difficult.
An upbeat industry at the start of the year met one of its biggest challenges, but instead of being a headwind, it quickly turned into a tailwind.
The backbone of computing architecture for 75 years is being supplanted by more efficient, less general compute architectures.
How long a chip is supposed to function raises questions design teams need to think about, including how much they trust aging models.
New interconnects and processes will be required to reach the next process nodes.
After failing in the fab race, the country has started focusing on less capital-intensive segments.
Servers today feature one or two x86 chips, or maybe an Arm processor. In 5 or 10 years they will feature many more.
SRC’s new CEO sheds some light on next-gen projects involving everything from chiplets to hyperdimensional computing and mixed reality.
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