Ellie Burns

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Ellie Burns is product manager of the Calypto Systems Division of Mentor Graphics. She has 30 years of experience in the chip design and EDA industries in various roles; including engineering, applications engineering, technical marketing, and product management. Prior to Mentor Graphics, she held engineering and marketing positions at CoWare, Cadence, Synopsys, Viewlogic, Computervision and Intel. She holds a BSCpE from Oregon State University.

Author's Latest Posts

The Secret to Reaching Rapid Verification Closure

By Ellie Burns - 16 Jun, 2016 - Comments: 0

Every design team is looking to reduce RTL verification time in order to meet aggressive schedules. Successful teams have moved their level of design abstraction up to the C++ or [gettech id="31018" comment="SystemC"] level and employ [getkc id="105" comment="high-level synthesis"] (HLS) within their design flow. By taking advantage of this high-level description, these teams also plug into int... » read more

An Introduction To Reducing Dynamic Power

By Ellie Burns - 14 Apr, 2016 - Comments: 0

In the past few blogs we have been primarily talking about UPF and applying the Successive Refinement process to save power. But, this process addresses leakage power. In this session we want to talk about how to save dynamic power. As designs move to finFET technology, dynamic power is the dominant contributor to power consumption. Power consumption trend. I recently sat down with my c... » read more

Power Analysis Plus Power Management

By Ellie Burns - 10 Mar, 2016 - Comments: 0

In my earlier blogs we've heard from some of the experts on using UPF in the successive refinement flow. We’ve talked about controlling leakage power, bringing power down, and validating power management behavior using coverage and simulation, including debug and clock domain crossing verification. In order to do the last step in the successive refinement flow, you need to use emulation be... » read more

Automating Coverage And Analysis Of Low Power Designs

By Ellie Burns - 11 Feb, 2016 - Comments: 0

There are some exciting new things in the just released IEEE1801-2015 (aka UPF 3.0), some of which have significant benefits for coverage of low power designs, which is what we’ll be looking at in this blog. One of these is improved semantics for the add power state command, introduced in IEEE1801-2009 (aka UPF 2.0). These clarifications to the add power state command allow you to clearly ... » read more

Three Steps To Complete Power-Aware Debug

By Ellie Burns - 28 Jan, 2016 - Comments: 0

In previous blogs, we’ve talked about UPF and the successive refinement low power flow developed by ARM and Mentor Graphics (you can find these here.) In this blog we’d like to walk through some typical debugging scenarios our customers face in their low power designs. So I’ve asked two of our low power debug experts, Gabriel Chidolue and Mark Handover, to join me to make sure you get ... » read more