February 2009 - Semiconductor Engineering

Another Brick In The Wall
By Ed Sperling - 19 Feb, 2009 - Comments: 0

The wall is in sight.   Moore’s Law has propelled the semiconductor industry at an amazing velocity since it was first introduced in 1965, and despite some minor changes from 18 months to two years, we have pretty much stayed on course. In the past, most people thought we would hit the wall at 1 micron, and they thought it would happen again at 32nm. The road map appears pretty solid dow... » read more

ESL Languages: Which One Is Right For Your Needs?
By Jon McDonald - 19 Feb, 2009 - Comments: 0

The question about ESL language is the right one comes up over and over again.  As customers begin to understand the benefits of modeling and analysis at the system level, they must address this question as one of the first steps in getting started.   What language should be used for ESL—SystemC, SystemVerilog, UML or M? Technically, you can create an ESL/TLM platform in any language yo... » read more

NoC Your SoCs Off
By Ed Sperling - 19 Feb, 2009 - Comments: 0

By Ed Sperling The network on a chip (NoC) approach is gaining ground as an essential part of a system on a chip (SoC), providing the same kind of time-to-market advantage that well-tested intellectual property blocks provide. This follows almost eight years of hype about NoCs potential with little to show for it. Times have changed and there appear to be two main drivers, one technological a... » read more

Beyond CMOS: Making Way For The Next-Generation Of Semiconductor Materials
By Cheryl Ajluni - 19 Feb, 2009 - Comments: 0

By Cheryl Ajluni Before the advent of the cell phone, the idea of having access to a phone virtually anytime, anywhere and in a package smaller than a human hand seemed almost impossible. Today that innovation, and others like it, has become an everyday reality. In the process it has helped spawn a technologically-driven society that continually demands more for less and waits impatiently... » read more

The Quest For Faster Data Throughput On A Chip
By Ed Sperling - 19 Feb, 2009 - Comments: 0

By Ed Sperling As with all network topologies, the general rule is the faster the better. Jack Browne, VP of sales and marketing at Sonics, said his customers are asking for higher-speed interconnects. “Right now we’re at 300MHz,” he said. “They want to more than double that in the very near future and eventually get to 1GHz.” Getting to that speed is no simple ... » read more

Next Steps In Verification IP
By Ann Mutschler - 19 Feb, 2009 - Comments: 0

By Ann Steffora Mutschler With the cost of failure at an astronomical high, the last thing chip designers want to worry about is the physical IP they will use to build their SoC. In addition to less willingness on the customer’s behalf to take risks, complexity and economics have driven the need for more off-the-shelf IP and a corresponding rise in interest in verification IP. Compoundi... » read more

The Great Debate: Fewer Functions?
By Ed Sperling - 19 Feb, 2009 - Comments: 0

By Ed Sperling What do you do when you can’t fit any more functionality on a chip without blowing your power budget? That question is being debated inside IBM right now, and one of the more radical concepts is to actually have systems do fewer things. “That trend will happen,” said Brad McCredie, chief architect of the Power6 chip and an IBM Fellow. “I think devices w... » read more

Business Must Go On
By Ed Sperling - 12 Feb, 2009 - Comments: 0

Intel’s decision to invest $7 billion in 32nm fabs is possibly the best example yet that in spite of a drop in projected sales, technology companies need to invest in the future. We live in a cyclical business, and cycles begin and end.   Intel is better positioned than most semiconductor companies. It has the largest R&D budget—it’s hard to think of IBM as a chip company, even t... » read more

The Trouble With Multicore Software
By Ed Sperling - 12 Feb, 2009 - Comments: 0

David Patterson, Professor of Computer Science at UC Berkeley, presented his views to the Naval Postgraduate School about the prospects for multicore programming success. This video was excerpted from his presentation. [youtube vid=EDHXIH8DlLY] » read more

The In’s And Out’s Of Parasitic Extraction
By Ed Sperling - 07 Feb, 2009 - Comments: 0

Low-Power Engineering sat down with two of the top experts—Robert Hoogenstryd, director of marketing for design analysis and signoff at Synopsys, and Carey Robertson, Calibre product marketing director at Mentor Graphics—to talk about what changes at 28nm and 22nm and why parasitic extraction is becoming so important. [youtube vid=JXnUWN1uwGQ] » read more

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