September 2012 - Page 3 of 6 - Semiconductor Engineering

NAND Enters Tough Cycle
By Ed Sperling - 20 Sep, 2012 - Comments: 0

By Mark LaPedus The NAND flash memory market is entering into a new and painful cycle, a period that will impact suppliers, OEMs and fab tool vendors alike. For some time, there has been an oversupply and depressed pricing in the NAND market. In mid-2011, Micron, Samsung, SK Hynix and Toshiba put on the brakes in their capital spending plans. And in recent months, NAND suppliers in total h... » read more

Winners And Losers
By Joanne Itow - 20 Sep, 2012 - Comments: 0

By Joanne Itow Semiconductor revenues will log in a relatively lackluster growth for 2012, only 3% more than 2011. That is below the 4.8% CAGR (compound annual growth rate) over the past five years and well below the 8.4% CAGR over the past 10 years. On the other hand, semiconductor units continue to show healthy growth, driving up wafer demand. Units will grow slightly faster compared to the ... » read more

A Mischievous Muse
By Marc David Levenson - 20 Sep, 2012 - Comments: 0

By Marc David Levenson Moorissa, the muse of high technology, enjoys playing practical jokes on the mask-makers, whose annual meeting was the week of Sept. 10 in Monterey. It started long ago…For example, no sooner had mask makers learned how to write precise 1X masks with fancy electron beams than the wafer printing industry went to reduction steppers, negating the advantages of all that pr... » read more

Experts At The Table: IC Manufacturing Challenges
By Ed Sperling - 20 Sep, 2012 - Comments: 0

By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss future manufacturing challenges with Carlos Mazure, chief technical officer at Soitec; Jeff Hebb, vice president of laser product marketing at Ultratech; Markus Wimplinger, corporate technology development and IP director at EV Group; and Girish Dixit, vice president of the customer integration center and process inte... » read more

The Rolling Stones Of Chipmaking
By Applied Materials Writers - 20 Sep, 2012 - Comments: 0

By Cheryl Knepfler In 1993, when the Internet was mostly a science experiment, Applied shipped a new P5000 CVD system to the Motorola SPS (now Freescale) Oak Hill fab in Austin, Texas— where it was used to produce processors for Apple computers. A year later, Motorola installed its second P5000 system. Fast forward 20 years and you’ll find both tools on the production line and still runnin... » read more

DSA: High Stakes Game Of Alphabet Soup
By Ed Sperling - 20 Sep, 2012 - Comments: 0

By Mark LaPedus Directed self-assembly (DSA) is making progress for potential use in semiconductor production, but the industry must make some major advances in a sometimes forgotten and unsung segment—materials. DSA is a complementary patterning technology that makes use of block copolymer materials to enable fine pitches in chip designs. But today’s block copolymers based on poly (MMA... » read more

Universal Memories Fall Back To Earth
By Ed Sperling - 20 Sep, 2012 - Comments: 0

By Mark LaPedus Ten years ago, Intel Corp. declared that flash memory would stop scaling at 65nm, prompting the need for a new replacement technology. Thinking the end was near for flash, a number of companies began to develop various next-generation memory types, such as 3D chips, FeRAM, MRAM, phase-change memory (PCM), and ReRAM. Many of these technologies were originally billed as “uni... » read more

Materials Market To Top $50 Billion In 2013
By Lara Chamness - 20 Sep, 2012 - Comments: 0

By Lara Chamness Given current macroeconomic headwinds, this year is proving to be challenging to forecast. Most analysts recently downgraded their semiconductor revenue forecasts to flat or low-single digits, down from the more optimistic forecasts of 4% to 6% growth presented earlier in the year. SEMI believes that the semiconductor materials will trend with the device market. As such, th... » read more

A Hybrid Model/Pattern-Based OPC Approach For Improved Consistency And TAT
By Various Writers - 20 Sep, 2012 - Comments: 0

As the technology advances, OPC run time turns to be a big concern, and a great deal of our effort is directed toward speeding up the litho operations. In addition, the OPC simulation consistency sometimes deteriorates, which is a critical issue—especially for anchor features. On the other hand, full-chip designs usually comprise large arrays of basic cells, used by OPC engineers to tune OPC ... » read more

There’s More To EUV Than Source Power
By Katherine Derbyshire - 20 Sep, 2012 - Comments: 0

By Katherine Derbyshire For some time now, most industry coverage of EUV lithography has focused on the light source. As my colleagues have pointed out, source power limitations impose major constraints on not only potential EUV-based device manufacturing, but even on development of sub-20nm devices and process technologies. When throughput is in the neighborhood of four wafers per hour, lear... » read more

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