March 2015 - Page 4 of 11 - Semiconductor Engineering

Power/Performance Bits: March 24
By Jesse Allen - 24 Mar, 2015 - Comments: 0

Power from packing peanuts After setting up a new lab, a Purdue University research team was left with a problem: mountains of packing peanuts. Instead of filling bags destined for a dumpster, the team saw an opportunity to find the packing material a useful purpose. The result was a process to convert waste packing peanuts into high-performance carbon electrodes for rechargeable lithium-... » read more

TSMC: Rise of the “Phantom Node”
By Barry Pangrle - 23 Mar, 2015 - Comments: 0

TSMC’s financial results for Q4 of 2014 and for the full year were announced in January with TSMC stating it again had achieved record sales and profits. The fourth quarter saw TSMC set records for revenue, earnings per share and cash balance. TSMC made bold predictions last year about 20nm revenue by Q4 2014, and it appears it has met them (see 28nm Powers TSMC Forward, Part Deux). TSMC repo... » read more

3 Key IoT Benchmarks
By Ed Sperling - 23 Mar, 2015 - Comments: 0

The [getkc id="76" comment="Internet of Things"] has been billed as the next huge opportunity for semiconductors—tens of billions of things connected to a centralized infrastructure, to people, and in many cases to each other. After conducting hundreds of interviews with executives, engineers and university professors from all facets of the global supply chain over the past year and reviewin... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 20 Mar, 2015 - Comments: 0

For years, Altera’s sole foundry was TSMC. Then, not long ago, Altera selected Intel as its foundry partner for 14nm. TSMC still handles 20nm and above work for Altera. Now, Altera will soon select a foundry partner for 10nm. “Altera will make a decision on which foundry partner it will choose for 10nm finFET at the end of 1Q15, noting it will decide between Intel and TSMC,” said John Vin... » read more

Week 41: The Rise Of Security At DAC
By Anne Cirkel - 20 Mar, 2015 - Comments: 0

All potential attendees interested in security topics should know one thing—the Wednesday keynote on hacking automobiles, while sure to be compelling, will only scratch the surface of security-related content at DAC. Another presenter will talk about how increasing demand for “connected life on the go” and “Internet-enabled everything” opens up a wide variety of security issues for Io... » read more

The Week In Review: Design/IoT
By Jesse Allen - 20 Mar, 2015 - Comments: 0

Mergers & Acquisitions Silvaco acquired Invarian, anticipating integration of Invarian's methodology will accelerate adoption of concurrent power-voltage-thermal analysis. Legal A U.S. District Court judge ordered Kilopass to pay $5.5 million to Sidense for legal fees incurred in Kilopass' patent infringement suit against Sidense. That lawsuit was  dismissed in 2012. Sidense filed... » read more

Fab Capacity Shortages
By Ed Sperling - 19 Mar, 2015 - Comments: 0

Planning fab capacity is a little like parachuting out of an airplane. Your chances of getting hurt are 50-50 every time you jump, and past experience doesn't necessarily make it safer the next time. At the leading edge, there is debate about just how much capacity should be added at 16/14nm, or whether the lion's share of that investment should go to 10nm or even 7nm. At least part of the d... » read more

Searching For 3D Metrology
By Mark LaPedus - 19 Mar, 2015 - Comments: 3

In the previous decade, chipmakers made a bold but necessary decision to select the [getkc id="185" kc_name="finFET"] as the next transistor architecture for the IC industry. Over time, though, chipmakers discovered that the finFET would present some challenges in the fab. Deposition, etch and lithography were the obvious hurdles, but chipmakers also saw a big gap in metrology. In fact,... » read more

5 Reasons EUV Will Or Won’t Be Used
By Michael Watts - 19 Mar, 2015 - Comments: 1

Digging into this subject, there are five metrics that count in a lithography tool: resolution, throughput, defects, overlay, and reliability. So what does the best data tell us about the current state and realistic prognosis for [gettech id="31045" comment="EUV"]. Semiconductor Engineering posed this question to Matt Colburn, senior manager for patterning research at [getentity id="22306" comm... » read more

3D Effects At 20nm And Beyond
By Ann Mutschler - 19 Mar, 2015 - Comments: 0

At the 20nm process node and below, attenuated phase shift masks (PSM) are used in the photolithography process, which results in approximately 70nm of topography. This now must be accounted for using 3D mask approximation. Aki Fujimura, CEO of [getentity id="22864" comment="D2S"], explained that in terms of [getkc id="80" comment="lithography"], where simulation-based technologies are used,... » read more

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