3D Effects At 20nm And Beyond

Topography as a result of attenuated phase shift masks at 20nm and below requires taking 3D effects into account.


At the 20nm process node and below, attenuated phase shift masks (PSM) are used in the photolithography process, which results in approximately 70nm of topography. This now must be accounted for using 3D mask approximation.

Aki Fujimura, CEO of D2S, explained that in terms of , where simulation-based technologies are used, that when it comes to masks, simulation is just not enough.

That affects how the mask looks in profile, and how is it handled. “The typical wafer simulation — also known as the thin mask model — is assumed it is either open or closed. The mask 3D effects are saying you can’t make that assumption anymore in order to be accurate enough to be able to look at the 3D mask profile. This is why a mask’s 3D profile at each curvature point becomes an important thing to be able to predict,” he pointed out.

In fact, 3D mask effects have become a significant contribution to the total lithographic error budget over the last couple of technology nodes, said George Bailey, director of technical marketing for the Silicon Engineering Group at Synopsys.

“Lithographers were reluctant to correct the mask 3D effects during OPC in the past due to the runtime penalty of deploying a physical solution, so they would instead deploy empirical-based mask biasing techniques. Below 20nm, these biasing techniques are no longer adequate, so lithographers need a more physical solution that works for full-chip applications,” he said.

And while mask 3D effects aren’t new, the impact varies depending on the shape, and that variation is significant compared to the sizes.

“Fortunately, this is not something designers have to worry about,” said Fujumara. “In fact, it’s not even something that the manufacturing community or the design-to-manufacturing interface part has worried about in the past. But in the last five years, there have been instances where a user can say it’s not really a thin mask model, there needs to be height and depth dimension as well. You should assume that the angle of the sidewall is something like 87%, as an example, instead of 90%. So, instead of thinking it is 90 degrees, assume there is a thickness and some angle and it’s a uniform model everywhere, and that is done in the more sophisticated lithography models even today. In that sense, designing the masks, they take that into account sometimes.”

Ya-Chieh Lai, engineering director for DFM/CLS silicon signoff and verification at Cadence, agreed. “While it is true the mask 3D effects are increasingly important, there should not be a direct impact on the design side. Mask 3D is an OPC modeling issue and OPC models need to properly account for mask 3D effects.”

That’s assuming everyone on the design side works within the rules, though. “From the designer perspective, it is the typical dichotomy between design and manufacturing that has always happened. You divide design issues and manufacturing issues as much as you can; the communication and coordination happens on the design side through design rules. So, the manufacturing guy says, ‘As long as you follow these design rules, it’s our responsibility to make sure it’s manufacturable with reasonable yield.’ The design side says, ‘Okay, but within those design rules, as long as I follow those design rules, I’m free to do whatever creative things that I need to be able to do, to impact the design as much as possible.’”

That relationship is breaking down, though, because design rules are now so complex. “If you try to express it only in design rules, it becomes too complex, and then the designers complain and say, ‘For this critical part, I need an exception.’ They work out with the fab folks on a case by case basis for the critical parts of very high volume chips,” he said.

Taking the 3D profile into account will be happening more in the 7nm-and-beyond era, but it’s not something that designers are having to worry about today, Fujimura added. “It will still be that designers will design to the design rules, and then it’s up to the manufacturers — in this particular case, the mask maker or the wafer maker, or a combination of both — to make sure that what the designer wanted to do is what comes out on the wafer at the end. The way they would do that is if there is some specific 3D effect that needs compensation, they apply that compensation so that the designers can pretend the effect doesn’t exist and software processing takes care of it for them.”

John Sturtevant, director of product development for modeling and verification at Mentor Graphics, observed that going back to the early days of alternating phase shift mask (PSM, also known as complementary phase shift or hard phase shifting), this was a technology that was pretty revolutionary all the way back into the 1990s.

“The alternating PSM never really caught on [then] for the most part, but it is differentiated in terms of the magnitude of that topography, whereas with today’s topography the height of features on a mask today might be 40 to 70nm,” Sturtevant said. “For the alternating PSM, the topography on the mask would be many, many multiples of that — 300 to 400nm. It was very aggressive but introduced a whole host of problems. It gave a lot of process window improvement, which was to etch into the quartz substrate down to a specific depth that corresponding to 180 degrees phase shift, and that had some nice properties for the aerial image and improved the process window on the wafer. That in itself gave rise to significant amount of design considerations.”

But at 20nm and below, the industry is using attenuated PSM, which has about 70nm of topography that must be accounted for using 3D mask approximation.

“If you now take a closer look at that 70nm of topography, for first order, we assumed the profile of that 70nm step is vertical. If you picture the cross section, you can imagine different subtleties associated with the profile. You can have the bulk profile itself and that can be vertical at 90 degrees or it could be slightly less, unlikely that it could be re-entrant because it’s a dry etch step in the mask shop that does this, so it’s 90 degrees or less. You could also have some corner rounding right at the interface on the very top of the stack. You could also have some corner sloping at the very bottom of the stack. There are sometimes anti-reflective coating materials that introduce the second material; there is sometimes a deliberate over-etch into the quartz of a few nanometers — so there’s an awful lot of fine structure to what this looks like,” he explained.

Mentor Graphics found that the No. 1 determinant that most significantly impacts the ability to predict the actual performance on wafer is that profile slope. “This was something that not many of the mask shops had published on, and while all our customers were typically saying 90 degrees — we have the ability to set the model according to any angle,” Sturtevant said.

As such, Mentor Graphics has developed models that can be empirically tuned to the wafer data that the model is being fitted to, and lets the slope be a free-fitting parameter.

Spearheading the effort
To deal with all of these issues, Fujimura observed that the mask makers are trying to make it so that the 3D mask effect models are not varying. After that, because it can’t be controlled anymore, there has to be some level of compensation that occurs so that the effect on the wafer is neutralized. “So if because of 3D effects it’s going to end up being too small, then they would have to compensate for that by drawing the features big to begin with so that when it comes out smaller, it is what the designer intended. There isn’t a consistent pattern in history of which way it goes, but this can happen either on the wafer side to compensate or on the mask side to compensate. Usually it depends on what the wafer fab wants. If the wafer fab wants the mask side to take care of it, then the mask community should take care of it. If the wafer fab thinks that it is important for them to take care of it themselves, then the wafer fab is going to end up controlling it.”

Synopsys is addressing 3D effects with what it calls Rigorous Proteus Modeling (RPM), which it said is efficient enough for full-chip applications yet contains physical terms similar to the rigorous models used for first-principle simulators like Sentaurus Lithography.

Bailey said RPM’s use of physical terms enables lithographers to correct for physical effects like mask 3D during the full-chip mask synthesis process, and recent results have shown PRM to be 1500X faster than a pure rigorous model and 2.8X more accurate than a 2D model.

EUV just makes it tougher
As far as when the industry needs to work on 3D effects, Fujimura said the time is now. “It’s not going to hit the design side for a while, but on the manufacturing side, this is something that people have to worry about. The most important thing is that this variation in 3D profile is hugely accentuated when you talk about small features and complex features. When you have non-orthogonal features, that’s when this becomes really bad, and at the recent SPIE conference, almost every talk was about inverse lithography technology because complex shapes are required to do 10nm and 7nm without going to EUV. If you go and do it with 193i, you have to have it. Feature sizes are not getting smaller, but 193i can only resolve so much with multiple patterning. But because of multiple patterning, you have so much position required in the actual placement of where they go…and you need much more precise control in the OPC steps. The way to get that is by deploying complex shapes. Complex shapes and small shapes are the biggest challenges, which is what is happening with ILT shapes. When that happens, the 3D mask modeling requirement is going to be a first-level issue.”

Sturtevant agreed things get more challenging with EUV, specifically, the 3D effects are different and more severe. “Now you’ve got this multilayer reflector stack for the reflecting reticle instead of a transmissive reticle, and now you have topography due to the absorber and it’s fairly severe. Another problem is that now instead of the light in the scanner impinging directory normal to that mask, it’s coming in with a chief ray at 6 degrees that causes shadowing effects, where with EUV the 3D mask effects have not only the effect that they do in 193 immersion lithography. That is the change with the CD, as a function of proximity. It also changes the position of best focus, as a function of features. You now have this effect where you move the line laterally right and left and account for that in the model. In one sense, it’s more complexity, but it’s still fully contained within the model that’s used.”

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