November 2015 - Page 3 of 10 - Semiconductor Engineering


ARM Cortex SoC Prototyping Platform For Industrial Applications


Modern industrial systems are faced with many key design challenges including: system complexity, real-time performance requirements, evolving standards, and rising costs. ASIC prototyping platforms, such as the Aldec HES-7, provide a platform for designers to implement and verify functionality of industrial systems at-speed prior to silicon tape-out, saving money from costly re-spins. In this ... » read more

Fan-Out Packaging Gains Steam


Fan-outs are creating a buzz and gaining steam in the market at a pace far beyond what anyone would have expected even at the start of the year. The approach, which has been around for several years, is a wafer-level packaging process that enables ultra-thin, high-density packages. So why the buzz? Apple is apparently moving to [getkc id="202" kc_name="fan-out"] packaging, according to an... » read more

Software is Eating the World


The statement "software is eating the world" was coined by internet pioneer Marc Andreessen in 2011. Over the last decade, the role of electronics in our daily life has changed dramatically. To read more, click here. » read more

6 Key Benefits Of Thermal Testing


This whitepaper discusses the advantages of transient thermal test methods for IC package and thermal interface material (TIM) thermal characterization testing vs steady state methods. These methods assist verification of thermal performance for reliability, support package development & manufacturing decision making, and ensure accurate data sheet values used for selection by engineers. ... » read more

On-Chip Networks Optimize Shared Memory For Multicore SoCs


Performance of multicore SoCs is often dominated by external DRAM access, particularly in digital consumer devices running high quality video and graphics applications. Increasing core counts and newer DRAMs make the problems much more difficult. This article covers optimization of the on-chip network and memory system to achieve the required system throughput. For more information, click here. » read more

The Week In Review: Manufacturing


Is Moore’s Law alive or dead? That’s still a topic for debate. In any case, chipmakers continue to move to advanced nodes, but the transitions are taking longer. Even mighty Intel is struggling, based on what the company said about its 14nm finFET process during an investors meeting this week. In fact, Intel continues to struggle with its yields. “14nm yield is maturing; 14nm is still not... » read more

The Week In Review: Design/IoT


Mergers & Acquisitions On Semiconductor signed a definitive agreement to buy Fairchild Semiconductor for $2.4 billion in cash, combining forces in the power semiconductor market. The deal is the latest in a series of acquisitions and combinations as companies position themselves for the IoT/IoE/IIoT, a world of connected devices that spans from industrial to automotive to smartphones. Comp... » read more

You’re Not Alone


All too often we get caught up in our own work and our own issues, thinking no one else could possibly be having as much trouble as we are. The reality is that many, if not most, of the problems and challenges in IC verification are not unique to one design, one team, or one person. The natural reluctance of people to admit they are struggling with some aspect of their job often keeps them from... » read more

Can Nano-Patterning Save Moore’s Law?


For years the academic community has explored a novel technology called selective deposition. Then, more than a year ago, Intel spearheaded an effort to bring the technology from the lab to the fab at 7nm or 5nm. Today, selective deposition is still in R&D, but it is gaining momentum in the industry. With R&D funding from Intel and others, selective deposition, sometimes called ALD-e... » read more

Why Packaging Matters


The semiconductor package is changing. What was until very recently considered an afterthought is now becoming a key part of the design process at all major chipmakers, and a critical factor in the extension of Moore's Law. This is a sharp reversal of what was almost universally an afterthought in planar silicon design and manufacturing. Rarely was the package an integral part of the archite... » read more

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