April 2016 - Page 3 of 10 - Semiconductor Engineering


Automating Front-End SoC Design With NetSpeed’s On-Chip-Network IP


This white paper from The Linley Group examines the challenges of turning SoC architecture specifications into successful design implementations. It presents the case that SoCs are becoming too large and complex for existing design methodologies and identifies the need for a more automated front-end design process. To read more, click here. » read more

Next EUV Challenge: Pellicles


Extreme ultraviolet (EUV) lithography is still not ready for high-volume manufacturing, but the technology is at least moving in the right direction. Both the [gettech id="31045" comment="EUV"] light source and resists are making noticeable progress, even though there are still challenges in the arena. And then, there is the EUV mask infrastructure, which also has some gaps. “When EUV i... » read more

Blog Review: April 27


In a video, Cadence's Chris Rowan looks at the future of neural networks, particularly the shift from cloud-based to embedded devices and what we can increasingly expect from them. Waiting for RTL? Mentor's Rich Edelman suggests a way to get tests that are missing some simple RTL running with a bit of SystemVerilog. Synopsys' Richard Solomon provides a primer on calculating the bandwidth ... » read more

2.5D Becomes A Reality


Semiconductor Engineering sat down to discuss 2.5D and advanced packaging with Max Min, senior technical manager at [getentity id="22865" e_name="Samsung"]; Rob Aitken, an [getentity id="22186" comment="ARM"] fellow; John Shin, vice president at [getentity id="22903" e_name="Marvell"]; Bill Isaacson, director of ASIC marketing at [getentity id="22242" e_name="eSilicon"]; Frank Ferro, senior di... » read more

Formal Verification Applied To The Renesas MCU Design Platform Using OneSpin Tools


An effective measure of verification progress, together with guidance towards design areas remaining untested, requires a precise view of the test coverage achieved. To risk signing off the verification process without understanding the quality of testing raises the specter of post-production device bugs. OneSpin Solution’s patented Quantify technology employs Observation Coverage, which eval... » read more

Are Simulation’s Days Numbered?


Semiconductor Engineering sat down to discuss the limitations of simulation in more complex designs with [getperson id="11049" comment="Michael McNamara"], CEO of [getentity id="22716" comment="Adapt-IP”]; Pete Hardee, product management director at [getentity id="22032" e_name="Cadence"]; David Kelf, vice president of marketing for for [getentity id="22395" e_name="OneSpin Solutions"]; Lauro... » read more

Manufacturing Bits: April 26


Multi-beam inspection For some time, Singaporean startup Maglen has been developing a multi-beam e-beam inspection tool technology. Now, Maglen has reached two milestones. First, it has devised a full column test stand. The test stand includes a mechanical column and software. The second milestone is also significant. “We also dropped our beam and obtained our very first images,” sai... » read more

System Bits: April 26


Reconfigured Tesla coil electrifies materials In a development that could set a clear path toward scalable assembly of nanotubes from the bottom up, Rice University researchers have discovered that the strong force field emitted by a Tesla coil causes carbon nanotubes to self-assemble into long wires, a phenomenon they call Teslaphoresis. Rice chemist Paul Cherukuri led the team that develo... » read more

Power/Performance Bits: April 26


An on-chip light source Researchers at the Karlsruhe Institute of Technology (KIT) demonstrated that carbon nanotubes are suited for use as an on-chip light source. By integrating tiny carbon nanotubes into a nanostructured waveguide, the team developed a compact miniaturized switching element that converts electric signals into clearly defined optical signals. "The nanostructures act lik... » read more

10nm Versus 7nm


The silicon foundry business is heating up, as vendors continue to ramp their 16nm/14nm finFET processes. At the same time, they are racing each other to ship the next technologies on the roadmap—10nm and 7nm. But the landscape is complicated, with each vendor taking a different strategy. [getentity id="22865" e_name="Samsung"], for one, plans to ship its 10nm [getkc id="185" kc_name="fi... » read more

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