A new technical paper titled “3D integration of pixel readout chips using Through-Silicon-Vias” was published by researchers at CERN, IZM Fraunhofer and University of Geneva.
Abstract
“Particle tracking and imaging detectors are becoming increasingly complex, driven by demands for densely integrated functionality and maximal sensitive area. These challenging requirements can be met using 3D interconnect techniques widely used in industry. In this paper, we present the results of an evaluation of the 3D Through-Silicon-Via (TSV) technology, using the Timepix4 integrated circuit as a test-vehicle. We will present the concepts for 3D integration and test results from TSV-processed chips bonded to custom-designed circuit boards conceived as proofs-of-principle for future detector modules.”
Find the technical paper here. January 2025.
Diaz, Francisco Piernas, Jerome Alozy, Sara Al-Tawil, Jan Buytaert, Michael Campbell, Thomas Fritzsch, Kostas Kloukinas et al. “3D integration of pixel readout chips using Through-Silicon-Vias.” Journal of Instrumentation 20, no. 01 (2025): C01017.
Leave a Reply