A Better Path To Better 3D-IC Thermal Modeling

By Andras Vass-Varnai, Lee Wang, John Parry, Byron Blackmore, and Sudarshan Deo

In an era where artificial intelligence, autonomous vehicles, and high-performance computing push the boundaries of semiconductor technology, the thermal management of 2.5D and 3D integrated circuits has become a make-or-break factor in product success. The traditional approach of treating thermal analysis as an afterthought is no longer viable. As we pack more computing power into increasingly compact spaces through 3D IC packaging, we face thermal challenges that would have been unimaginable just a few years ago. With power densities soaring and die thicknesses shrinking below 100 micrometers, the industry needs a paradigm shift in how we approach thermal management—one that synchronizes thermal considerations across die, package, and system levels from the very beginning of the design process.

The thermal challenge in advanced packaging

The semiconductor industry’s evolution toward three-dimensional integrated circuits represents a fundamental shift in thermal management requirements. Traditional 2D single-chip IC thermal considerations, which were primarily handled through simple design rules and often simple, template-based model building solutions, no longer suffice for today’s complex architecture. Historically, dies and packaging were designed in two separate development processes using different toolsets. Modern 3D configurations present a new set of thermal challenges that demand innovative design workflows, as chiplet and packaging design have become intricately linked.

The vertical stacking of active dies in 3D ICs has created unprecedented power density challenges. This situation is further complicated by the use of thinned dies, typically much less than 100 micrometers, which significantly reduces the die’s own lateral heat spreading capabilities, exacerbating hot spots. When multiple heat-generating layers are placed in close proximity, the limited thermal dissipation paths through complex material stacks create challenging thermal management scenarios that must be carefully analyzed and addressed.

The diverse connection methods employed in modern IC packages introduce additional thermal considerations. Through-silicon vias (TSVs) act as thermal bridges between layers, creating complex heat distribution patterns that must be accurately modeled. Micro-bump arrays significantly affect local thermal resistance, while hybrid bonding interfaces introduce new thermal considerations that were not present in traditional packaging. Interposer-based designs create added complexity to the thermal paths that require collaboration between design and analysis tools to manage and understand their thermal impact and optimize performance.

Fig. 1: Illustrative example of a 3D IC with heat dissipation.

With the increasing number of layers, often a heterogeneous mixture of silicon and compound semiconductor technologies, material and interface considerations have become increasingly critical in advanced packaging. For some materials, anisotropic, non-uniform thermal conductivity in different directions must be carefully considered, as must the temperature-dependent nature of material properties to model non-linear behavior. Interface thermal resistance, once mostly affecting package boundaries, has become a crucial factor in determining overall thermal performance.

To address these unprecedented thermal management challenges, Siemens’ emphasis has pivoted from designing specific best-in-class tools to creating integrated workflows to serve the needs of various user personas. Package architects and design engineers without deep thermal expertise now need to be able to quickly assess thermal implications and identify potential temperature-limiting factors early in the architectural design stage. Automating the process of converting design data into thermal and multiphysics models is crucial to enable these non-thermal experts to perform feasibility studies without relying on domain specialists. Additionally, the complexity of these large 3D designs makes it increasingly difficult even for experienced computational fluid dynamics engineers to build accurate thermal models from scratch, further increasing the value of automation.

Siemens’ solution, including Calibre 3DThermal software, Innovator3D IC solution, and Simcenter Flotherm software, addresses these challenges by providing automated workflows to bridge the gap between electrical/package design and thermal analysis. The design is assembled and managed in Innovator3D IC as a single-source of truth, and this design data can then be exported to Calibre 3DThermal for thermal analysis as the design matures from early architectural planning to final sign-off. The tool provides electrical designers rapid and accurate feedback on expected semiconductor junction temperatures to help them make sure that the design is still thermally feasible, without leaving the design environment they are comfortable working within. To serve the thermal analyst persona, these thermal models can be exported to Simcenter Flotherm, where the package-level thermal model can be augmented with system-level features such as PCBs, heatsinks, heat pipes, and fans to enable comprehensive system-level thermal analysis and optimization. This allows package architects, design engineers and thermal specialists to collaborate more effectively, identify and mitigate thermal issues early and optimize performance and cooling solution cost across all integration levels. The goal is to ensure reliable operation of complex multi-die packages by making thermal considerations an integral part of the design process rather than a separate concern.

Advanced silicon-level thermal modeling

Siemens has developed a comprehensive solution that addresses these thermal challenges through multiple integrated approaches. At the die level, the solution begins with sophisticated physical database processing. A novel tool, Calibre 3DThermal, built on core technologies such as Calibre and Simcenter Flotherm, can perform advanced parsing of LEF/DEF, GDS and OASIS files to extract detailed die-level geometry information, enabling precise thermal property mapping and detailed semiconductor-level thermal model creation. This process includes intelligent layer stack-up analysis and hotspot modeling, while incorporating process-specific thermal characteristics essential for accurate modeling.

The solution includes advanced capabilities for back end of line (BEOL) layer modeling, creating effective thermal conductivity models that accurately represent complex local metal and dielectric structures. Each layer’s thermal properties are calculated individually, considering metal density and distribution patterns. The system integrates via patterns and density effects to create a comprehensive thermal model that reflects real-world behavior, leveraging techniques such as material maps (effective material property extraction) compatible with system-level tools such as Simcenter Flotherm.

Combined with mPower, power analysis and mapping capabilities provide detailed insights into thermal loading. The system generates comprehensive power maps from circuit simulation data, incorporating switching activity information to create accurate dynamic power profiles. This analysis includes statistical power distribution considerations, enabling designers to understand both average and peak thermal conditions. Together with Solido software, Calibre 3DThermal can provide temperature information to increase the predictive accuracy of SPICE simulations of analog and mixed signal IC designs.

3D IC designs are characterized as having very high current densities, in the region of hundreds of amps, so the solution also provides sophisticated joule heating analysis capabilities. High-resolution current density mapping is combined with temperature-dependent resistance calculations to provide accurate self-heating effect analysis. This information is integrated with power distribution network analysis to create a complete picture of thermal loading.

The system’s electro-thermal simulation capabilities are particularly valuable for analog circuits, where temperature effects can significantly impact performance. The solution provides coupled electrical-thermal analysis that incorporates temperature-dependent device models and considers thermal feedback loops. Both steady-state and transient analysis capabilities ensure comprehensive coverage of thermal scenarios by exporting a back-annotated SPICE netlist that includes local device temperatures that can then be used by a SPICE simulator like Solido.

Fig. 2: High-fidelity chip model using detailed design geometries.

To support modeling complex 2.5D, 3D structures and their package features, the requirements of detailed design geometries extend beyond simple die representation. Calibre 3DThermal creates high-fidelity 3D IC models by combining 3D stack-up definitions with precise design geometries to account for non-uniform material properties throughout the structure. This is particularly crucial when analyzing the thermal path at and beyond the package boundaries, such as models of the external cooling assemblies.

Early thermal feasibility analysis is another crucial capability of the Calibre 3DThermal solution. The system enables designers to perform thermal assessments from the earliest stages of design, allowing them to identify and address potential thermal issues before they become costly problems. This early analysis capability supports an iterative design approach, where thermal considerations can inform and guide design decisions throughout the development process and cooling solution choices at the board and system levels.

Comprehensive design flow integration

The integration capabilities of Siemens’ thermal management solution extend far beyond basic tool compatibility. At the heart of this integration is the seamless workflow between various design tools, particularly the sophisticated interaction between Calibre 3DThermal and Innovator3D IC for pack- age-level architecture and assembly. This integration enables designers to maintain consistency and accuracy throughout the entire design process, from initial concept to final verification.

Fig. 3: Siemens’ integrated 3D IC design and thermal analysis process.

Central to this integrated approach is the management of digital twins for all structural components in the package stack. Beyond being the perfect tool for designing the connectivity system from the dies to the environment, Innovator3D IC maintains a comprehensive digital representation of every physical element in the design, ensuring that the thermal model accurately reflects the actual physical structure being developed. This digital twin approach serves as a single source of truth for package structural elements, automates the model creation and reduces the possibility of errors in thermal analysis, thereby making it easier for non-thermal experts to perform high fidelity analysis.

Fig. 4: Advanced package floorplan and connectivity in Innovator3D IC.

The solution’s support for multiple design iterations with increasing fidelity is particularly valuable in modern IC package development. Initial analysis can be performed with simplified models to quickly evaluate early floorplan ideas, while subsequent iterations can incorporate increasingly detailed information as it becomes available. This continuous progressive refinement approach allows designers to maintain efficient workflows, mirroring the real design process, while ensuring that final analyses incorporate all necessary detail for accurate thermal prediction before final tape-out of the design.

The system’s integration with standard IC design and place-and-route tools ensures that beyond detailed die, accurate interposer and substrate representations can also be reflected in the final thermal models. This integration supports the 3DSTACK+ format and 3Dblox designs, providing compatibility with a wide range of design methodologies and tools. The result is a cohesive design environment which allows the user to augment the design with thermal properties such as material data, power and boundary conditions. This and the geometry and location information from the design can be transferred to Calibre 3DThermal with a single click for automated thermal simulation. Through this approach, thermal analysis becomes an integral part of the design process, rather than a separate consideration.

Fig. 5: Thermal simulation results carried out on the design shown in figure 4.

Another significant feature of the workflow is the ability to export FloXML or .pack files after the Calibre 3DThermal run, fully compatible with Simcenter Flotherm at any stage of the design. This integration is particularly advantageous for thermal analysts working with advanced semiconductor packages, such as multi-die or 3D stacked configurations, as the model can be automatically built up based on actual design data. Simcenter Flotherm provides comprehensive tools for managing the thermal simulations of these complex packages, addressing both package-scale phenomena and their interactions within system-level environments. Simcenter Flotherm’s capabilities include precise modeling of heat dissipation pathways, airflow patterns and thermal coupling between densely-packed components, which are essential for ensuring reliable performance in high-density electronic assemblies. Additionally, Simcenter Flotherm can connect to multiphysics workflows, enabling the simultaneous analysis of thermal, electrical and mechanical interactions that are critical in advanced package designs.

Fig. 6: Simcenter Flotherm model of the design shown in the previous examples.

With FloXML automating the generation of detailed thermal models, analysts can effortlessly import sophisticated package geometries and material properties into Flotherm without the need to rebuild models from the ground up. This workflow not only accelerates the simulation process but also enhances accuracy by maintaining consistency between the design and simulation models. Furthermore, the solution’s ability to maintain data consistency across different tools and design phases helps prevent errors that commonly arise from manual data transfer or translation. This automated data handling ensures that thermal analysis results accurately reflect the current state of the design, even as it evolves through multiple iterations.

Conclusions

The combination of Calibre and Flotherm technologies creates an unparalleled thermal design environment. Calibre’s expertise in detailed semiconductor analysis is combined with Flotherm’s system-level thermal modeling capabilities to deliver a complete thermal analysis solution. The solution allows for precise modeling of material distributions within the die, including complex BEOL structures, metal density variations, and TSV impacts. When combined with detailed power mapping from circuit simulation data and switching activity analysis, these models capture the true thermal behavior of modern 3D IC designs.

The ability to leverage complex package floorplans in Innovator3D IC sets this solution even further apart. By understanding the design and combining these detailed die-level models with precise representations of interposers and substrates, the Siemens workflow can convert comprehensive design data into highly predictive thermal models that accurately represent the complete thermal paths through advanced package designs. This automation not only saves time but also ensures consistency and accuracy that would be very hard to achieve with existing modeling approaches. Modeling best practices and meshing are all under the hood in this solution, eliminating the need for manual intervention and expertise in these areas.

The integration with Simcenter Flotherm extends these capabilities further, enabling system-level thermal analysis while maintaining the fidelity of the detailed die-level models. For designers working on cutting-edge applications in AI, machine learning, autonomous driving, and aerospace systems, this integrated approach provides the accuracy needed for successful first-time designs. The combination of detailed die-level modeling, automated package thermal model creation, and system-level analysis capabilities ensures that thermal considerations are properly addressed across all levels of integration.

This comprehensive solution empowers design teams to confidently push the boundaries of 3D IC packaging while maintaining thermal integrity and reliability. The result is a truly predictive thermal modeling environment that bridges the gap between detailed semiconductor level thermal models and system-level thermal behavior, enabling the next generation of advanced package designs.

For more background and detail on 3D IC thermal modeling best practices, please see the new paper from Siemens, Synchronizing die, package and system level thermal modeling: A Path to Better 3D IC Thermal Modeling.

Lee Wang is a principal product manager at Siemens EDA.

John Parry is director of Simcenter for Electronics & Semiconductor at Siemens Digital Industries Software.

Byron Blackmore is a director of product management, Industry Solutions at Siemens Digital Industries Software.

Sudarshan Deo is a senior engineer for 3D IC solutions at Siemens EDA.