tag: thermal

Floor-Planning Evolves Into The Chiplet Era
By Karen Heyman - 25 Jul, 2024 - Comments: 0

3D-ICs and heterogeneous chiplets will require significant changes in physical layout tools, where the placement of chiplets and routing of signals can have a big impact on overall system performance and reliability. EDA vendors are well aware of the issues and working on solutions. Top on the list of challenges for 3D-ICs is thermal dissipation. Logic typically generates the most heat, and ... » read more

Data Center Thermal Management Improves
By Karen Heyman - 18 Jul, 2024 - Comments: 0

Thermal issues are plaguing semiconductor design at every level, from chips developed with single-digit nanometer processes to 100,000-square-foot data centers. The underlying cause is too many devices or services that require increasing amounts of power, and too few opportunities for the resulting heat to dissipate. “Everybody wants to try to do more in a small volume of space,” said St... » read more

Thermal Challenges Multiply In Automotive, Embedded Devices
By Karen Heyman - 02 Jul, 2024 - Comments: 0

Embedding chips into stacked-die assemblies is creating thermal dissipation challenges that can reduce the reliability and lifespan of these devices, a growing problem as chipmakers begin cramming chiplets into advanced packages with thinner substrates between them. In the past, nearly all of these complex designs were used in tightly controlled environments, such as a large data center, whe... » read more

Temperature: A Growing Concern For Chip Security Experts
By Adam Kovac - 13 Jun, 2024 - Comments: 0

While everyone in the semiconductor industry wants to have the hottest new product, having that type of temperature manifest in a literal sense poses a threat not just to product stability and performance but to the security of the chips themselves. Temperature has become an object of fascination to security researchers due to the vagaries of how the physical properties of heat affect perfor... » read more

Liquid Cooling And GaN: A Winning Combination
By Paul Wiener - 06 Jun, 2024 - Comments: 0

Data centers are facing an unprecedented transformation due to the surge in generative AI and other emerging technologies. A single ChatGPT session consumes 50 to 100 times more energy than a comparable Google search, escalating data center rack power requirements towards 200 kW or more, presenting serious challenges for operators. Cooling, in fact, takes up about 40% of the power requireme... » read more

The 3D-IC Multiphysics Challenge Dictates A Shift-Left Strategy
By John Ferguson - 25 Apr, 2024 - Comments: 0

As the industry marches forward in a 3D-IC centric design approach (figure 1), we are facing a new problem. Sometimes referred to as “electro-thermal” or “electro-thermo-mechanical,” it really is the confluence of multiple forms of physics exerting impacts on both the physical manufacture and structure of these multi-die designs and their electrical behavior. Fig. 1: Illustration... » read more

Package Integrated Vapor Chamber Heat Spreaders
By Sanghyuk Kim - 21 Mar, 2024 - Comments: 0

With continuous increases in computational demand in nearly all electronics market segments, even historically lower power packaging is being driven into challenging thermal management situations. Node shrink alone is reaching a limit in maintaining track with Moore’s law. The economics and yield challenges of large monolithic system on chip (SoC) designs are driving the development of silico... » read more

3D-IC Intensifies Demand For Multi-Physics Simulation
By Ann Mutschler - 20 Mar, 2024 - Comments: 0

The introduction of full 3D-ICs will require a simultaneous analysis of various physical effects under different workloads, a step-function change that will add complexity at every step of the design flow, expand and alter job responsibilities, and bring together the analog and digital design worlds in unprecedented ways. 3D-ICs will be the highest-performance advanced packaging option, in s... » read more

Predicting Warpage in Different Types of IC Stacks At Early Stage Of Package Design
By Technical Paper Link - 15 Mar, 2024 - Comments: 0

A new technical paper titled "Warpage Study by Employing an Advanced Simulation Methodology for Assessing Chip Package Interaction Effects" was published by researchers at Siemens EDA, D2S, and Univ. Grenoble Alpes, CEA, Leti. Abstract: "A physics-based multi-scale simulation methodology that analyses die stress variations generated by package fabrication is employed for warpage study. The ... » read more

Backside Power Delivery Adds New Thermal Concerns
By Karen Heyman - 14 Mar, 2024 - Comments: 0

As the semiconductor industry gears up for backside power delivery at the 2nm node, implementation of the technology requires a re-thinking of established design practices. While some EDA tools are already qualified, designers must acquaint themselves with new issues, including making place-and-route more thermal-aware and how to manage heat dissipation with less shielding and thinner substr... » read more

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