Why Chiplets Don’t Work For All Designs


Experts at the Table: Semiconductor Engineering sat down to discuss use cases and challenges for commercial chiplets with Saif Alam, vice president of engineering at Movellus; Tony Mastroianni, advanced packaging solutions director at Siemens Digital Industries Software; Mark Kuemerle, vice president of technology at Marvell; and Craig Bishop, CTO at Deca Technologies. What follows are excerpts... » read more

Research Bits: September 19


Measuring lithography plasma sources Researchers from the University of Twente developed a tool that can measure the size of a plasma source and the color of the light it emits simultaneously, which they say could be used to improve lithography machines. “Traditionally, we could only look at the amount of light produced, but to further improve the chipmaking process, we also want to study... » read more

No Hot Products


While marketers strive to launch the next “hot” product, engineers struggle to prevent literally hot products! A recent breakthrough in thermal modeling comes just in time as electronic component manufacturers and their OEM customers increasingly battle thermal design issues. Analog electronic component manufacturers have traditionally provided models in SPICE format so customers can sim... » read more

Battling Over Shrinking Physical Margin In Chips


Smaller process nodes, coupled with a continual quest to add more features into designs, are forcing chipmakers and systems companies to choose which design and manufacturing groups have access to a shrinking pool of technology margin. In the past margin largely was split between the foundries, which imposed highly restrictive design rules (RDRs) to compensate for uncertainties in new proces... » read more

Celsius EC Solver


The Cadence Celsius EC Solver is electronics cooling simulation software for accurate and fast analysis of the thermal performance of electronic systems. It enables electronic system designers to accurately address the most challenging thermal/electronics cooling issues today. The Celsius EC Solver utilizes a powerful computational engine and meshing technology that enables designers to model a... » read more

Holistic Power Reduction


The power consumption of a device is influenced by every stage of the design, development, and implementation process, but identifying opportunities to save power no longer can be just about making hardware more efficient. Tools and methodologies are in place for most of the power-saving opportunities, from RTL down through implementation, and portions of the semiconductor industry already a... » read more

Chiplet Placer with Thermal Consideration for 2.5D ICs


A new technical paper titled "Chiplet Placement for 2.5D IC with Sequence Pair Based Tree and Thermal Consideration" was published by researchers at National Yang Ming Chiao Tung University (Taiwan). Abstract "This work develops an efficient chiplet placer with thermal consideration for 2.5D ICs. Combining the sequence-pair based tree, branch-and-bound method, and advanced placement/pruning... » read more

When Less Can Be More With Smart Module Design: Part 1


Size and power often seem like opposite sides of a coin. When you reduce size – one of the ever-pressing goals in our industry – you inevitably reduce power. But does that have to be the case? By shifting our thinking from the chip to the module design, there’s no need to flip a coin. In IGBT modules, chip shrinkage leads to an increased thermal impedance, which then impacts performanc... » read more

Improving Performance And Power With HBM3


HBM3 swings open the door to significantly faster data movement between memory and processors, reducing the power it takes to send and receive signals and boosting the performance of systems where high data throughput is required. But using this memory is expensive and complicated, and that likely will continue to be the case in the short term. High Bandwidth Memory 3 (HBM3) is the most rece... » read more

IC Stresses Affect Reliability At Advanced Nodes


Thermal-induced stress is now one of the leading causes of transistor failures, and it is becoming a top focus for chipmakers as more and different kinds of chips and materials are packaged together for safety- and mission-critical applications. The causes of stress are numerous. In heterogeneous packages, it can stem from multiple components composed of different materials. “These materia... » read more

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