Abundant Change Ahead

Change does not mean less in any way, but Moore’s Law no longer will be the principal driver for the second half-century of semiconductor advancement.


There is nobody who would question the amazing ride that semiconductors have been on for the past 50 years. It has been described as the longest running exponential that humankind has ever been a part of—and it is not over yet. Still, the future is very likely to be substantially different from the past.

It is almost natural for us to see a trend and assume it will continue. There have been so many people who predicted the end of and they all finished up with egg on their faces. But this time it really is different. Sure, the next few nodes are fairly well mapped out and there are some promising technologies that could take over, but none of that is the point anymore.

The end is coming if the only thing you see ahead is devices getting smaller. They undoubtedly will shrink, but not at decreasing cost. 20nm was the first time that the cost curve was questioned, and at 16/14nm it gets worse. I also have no doubt that in time those costs will be brought down, but we all know that 10nm will be even more costly and that trend is likely to stick.

There is not a brick wall ahead for the industry, but there is a detour sign that says, ‘Business not as usual.’ Forgive me when I say the industry has become lethargic and even lazy. Sure, every designer is putting 100% effort into their job and probably spending 60 or more hours a week doing it. But that is no longer enough. It will not create the kinds of innovation that will be necessary to stay ahead for the next 50 years.

Going forward, we can only expect manufacturing technology to provide a piece of the advancement. More will come from EDA, which has been attempting to increase productivity at such a rapid rate to keep up with Moore’s law that it never had the chance to do a good job, only an adequate one. New EDA approaches and algorithms will substantially improve the rate at which designs can be done and the efficiencies that they can get from the silicon, or whatever technology may be in use.

The IP industry has had a huge impact on the design process and enabled us to stick with RTL for way longer than anyone though was possible. Maybe moving to a more design representation would have worked, as well. But we didn’t need to re-invent that wheel, and many argue we still don’t.

That doesn’t mean newer and better tools and languages are not required. We desperately need better ways to do SoC integration and verification. We need better ways to move information through the flow. We need better analysis, better prediction, better models – better almost everything. And they will come in time.

But perhaps more than anything else, we need a new approach to design itself. Design will not be a process of taking the previous design and adding a few new capabilities, upsetting as little of the design as possible and don’t even think about breaking any of the software. That mentality to design will get you nowhere anymore. Most of the next 50 years will come from better design.

It might appear as if this would add huge risks. It most certainly will in the near term, but longer term, the whole notion of design will be transformed. Companies may not even have designers on their books in the traditional sense. Design will become collaborative, and teams will be assembled for each design based on the talents necessary. Each design may look for a different set of talents or ideas.

The starting point for the architect may well be the equivalent of github for hardware. Here, designers from across the world will have designs, prototypes, ideas, some silicon proven, others not. Some of the designs will be incremental based on what was used in the past. Others may be radically different. Today, there are perhaps 10,000 hardware designers, but tomorrow that number could swell to 10 or 100 times that number.

This is made possible because every design will be highly customized for a particular application, and that means that every piece of IP will be customized. There will so much specialization that there will be enough work for everyone—so long as they keep reinventing themselves.


Kurt Shuler says:

I think the most change will occur in how we architect SoCs. Without the free lunch of cheaper, smaller transistors, we’ll need to use die area more efficiently. This means parallel processing, and in particular heterogeneous cache coherent systems that allow architects to use the best processing element for each job. Ann Steffora Mutschler wrote another good SemiEngineering article about this in March: http://semiengineering.com/coherency-cache-and-configurability/

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