How to improve time to market for complex switches and routers.
A larger number of ports, expanding throughput, decreasing latency and overall improvement in security and ease-of-use are making today’s network switches and routers among the largest IC designs ever developed, reaching beyond a half billion gates. Verification of such complex IC designs, before silicon availability, is a daunting task. A fast, accurate, easy-to-use solution, VirtuaLAB brings complex Ethernet SoC designs to market on schedule for increased productivity. An Ethernet VirtuaLAB provides a software-controlled environment for generating, transmitting, and analyzing Ethernet packets to test Ethernet SoCs mapped inside an emulation platform. As opposed to simulation where you can typically verify 1000 packets per day, VirtuaLAB Ethernet emulation can handle over 11 million packets per day and simultaneously support multiple concurrent users located anywhere in the world.
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