Aging Analysis Standard Solidifies Through Collaborative Effort

By Ahmed Ramadan, Greg Curtis, Harrison Lee, Jongwook Kye, and Sorin Dobre

We live in a connected world and it is estimated that by 2025¹ the total amount of worldwide data will swell to 163 ZB, or 163 trillion gigabytes. This rapid growth in data expansion is driving an explosion in new designs and new requirements for consumer, data center, automotive, and Internet of Things (IoT) applications. One of these requirements is an increased emphasis on longer term reliability.

Long term reliability has always been a focus for the automotive industry, but now includes other areas of technology design, such as mobile communication and IoT applications. As a result, accurate simulation of device aging over time has become an integral step in the verification process.

For designs utilizing mature technology nodes, aging effects are often addressed by simply overdesigning at the cost of valuable margins left on the table. In today’s extremely competitive market, designers have to optimize each and every design parameter to gain margins. These slim, cost-saving margins cannot be achieved without also considering, by accurately estimating, the long term impact of aging.

Increased reliability problems at the device level are a direct result of degradation of the gate dielectric, and of the interface between gate dielectric and silicon over time. Two important mechanisms that contribute to degradation are the Hot Carrier Injection (HCI) and the Positive/Negative Bias Temperature Instability (PBTI/NBTI). These mechanisms are more prominent at smaller geometries because the gate dielectric is scaled to only a few atoms in equivalent thickness. Over time, device aging increases the threshold voltage and decreases the channel carrier mobility, which degrades circuit performance, shortening circuit lifetime, and introducing potential failures in the field.

Until recently, foundries had to support a variety of model interfaces as a common, industry-standard interface solution for access to aging models did not exist. Likewise, simulation suppliers were also required to support their own, unique interface. This non-standard approach added complexity and increased support costs for the supplier and end-user alike.

Why the Open Model Interface (OMI) is the standard solution
In June 2014, the Si2 Compact Model Coalition (CMC)² voted in favor of developing and supporting an interface that augments the standard CMC device models supported in circuit simulators. It would provide users the flexibility to customize the standard models to fit their own applications, all without touching the native implementation of these models. In April 2018, the first version of this Open Model Interface (OMI), based on the TMI interface, was released. The OMI interface supports both model parameters’ update and reliability simulation.

For reliability simulation, OMI offers an aging platform that enables aging modeling, simulation, and analyses, supporting any degradation mechanism (Figure 1). This platform includes Hot Carrier Injection (HCI), Bias Temperature Instability (BTI) and Time Dependent Dielectric Breakdown (TDDB). One step aging simulation and gradual aging simulations can be performed using the OMI aging flow. A key attribute of OMI is that it is simulator-agnostic. This means that the same OMI shared library can be used across different simulators that support OMI. Foundries can provide a unified OMI shared library to their customers, hiding the foundry’s modeling IP, as part of their technology design kit, without the need to alter the base model libraries they provide to their customers today. They only need to add the OMI-Aging portion to their package.

Figure 1. OMI Aging Flow

The OMI standard interface enables foundries, IDMs, and EDA vendors to focus their resources on supporting a single, common interface. Fabless companies and internal IDM design groups can also take advantage of whichever simulator they determine best for their technology mix. The CMC OMI Standard v1.0.0 supports the models: BSIM4, BSIM-CMG, BSIMSOI, and HiSIM2. More CMC standard models are planned to be included in the next version of the OMI.

Mentor, an EDA leader and an active member in the CMC, realized the key advantages of the OMI interface. The OMI standard has been supported by Mentor’s Analog FastSPICE (AFS) simulator since December 2018 and since then, Mentor has been working with key partners to benefit from that work.

Joint activity between Mentor and Samsung
Samsung Foundry and Mentor started technical cooperation in April 2019 to develop OMI-based reliability models by Samsung Foundry at Qualcomm’s request.

So far, most varieties of commercially-available reliability models have been developed as an add-on feature to each simulator. Although each simulator offers similar and valid aging functionality, they inherently suffer from various compatibility issues with other simulators. In contrast, the OMI model, a common modeling interface developed from the CMC, is an excellent candidate to eliminate the aging simulation discrepancies in different simulators.

With close collaboration with Mentor, Samsung Foundry developed an aging model with the native OMI, based on the reliability equations from the 7nm advanced technology node. The model was then verified with Analog FastSPICE (AFS), Mentor’s nm-accurate SPICE simulator, and other simulators in terms of accuracy and performance. The model, in turn, was successfully delivered to Qualcomm to be deployed in their circuit design flow.

In addition to the implementation of the reliability models, Samsung also explored and found the possibility to migrate various model features into the OMI, including the table look-up function, self-heating, LLE, and more.

Samsung plans to further improve the OMI through continuous technical cooperation, to provide seamless and common circuit simulation experience with the wider model feature coverage for all user environments.

Qualcomm experience
Qualcomm products are addressing the consumer electronic, high performance computing, and automotive markets. To meet the industry standard requirements for the automotive market they have used in the design and validation process the PDKs provided by Samsung Foundry which include support for OMI aging SPICE models. These models are used extensively with and without recovery for IP circuit optimization and functional sign off.

Designers have also used the OMI aging models in SoC digital design verification for critical circuits like clock trees, high performance IP’s, and high-speed interfaces. The OMI models are providing great flexibility to design community since they are SPICE simulator agnostic. Their designers were able to optimize and verify their circuits without the need to switch simulators between regular SPICE analysis versus aging SPICE analysis when using OMI. Having the aging OMI models provided by the Samsung Foundry in the standard PDK has helped their reliability team perform validation of the models and silicon-to-model correlation working with the foundry reliability team.

For all the advanced and legacy process technologies, they are enabling SPICE circuit aging analysis, optimization and validation using OMI models provided in the Samsung Foundry PDKs with all the existing commercial SPICE simulators, including AFS, within the Qualcomm design community.

Summary
We live in a connected world and the technology today is driving an explosion in new designs and new requirements. Long term reliability has always been a focus for the automotive industry, but is now expanding to include other areas of technology design. As a result, accurate simulation of device aging over time has become an integral step in the verification process. Through a collaborative effort, Mentor and Samsung are working together to ensure Qualcomm and other customers develop a successful product development roadmap with strong support for design automation, quality, and product reliability across all process technology nodes from planar technology to FinFET technology and beyond.

References
1] https://www.information-age.com/data-forecast-grow-10-fold-2025-123465538/#

2] Silicon Integration Initiative (Si2) Compact Model Coalition (CMC) http://www.si2.org/cmc/

Authors

Ahmed Ramadan is a Senior Product Engineer Manager, Analog/Mixed-Signal Verification Business Unit, at Mentor, a Siemens Business.

Greg Curtis is a Senior Product Manager, Analog/Mixed-Signal Verification Business Unit, at Mentor, a Siemens Business.

Harrison Lee is Principal Engineer for the Foundry Design Enablement Team at Samsung Electronics.

Jongwook Kye is Vice President of the Foundry Design Enablement Team at Samsung Electronics.

Sorin Dobre is the Senior Director of Technology at Qualcomm.