Who’s Responsible For Transistor Aging Models?


While there are a number of ways to go about reliability and transistor aging analysis, it is all in large part dependent on fabs and foundries to provide the aging models. The situation is also not entirely clear in the semiconductor ecosystem because the classic over-the-wall mentality between design and manufacturing still exists. And unfortunately this wall is bi-directional. Not onl... » read more

Transistor Aging Intensifies At 10/7nm And Below


Transistor aging and reliability are becoming much more troublesome for design teams at 10nm and below. Concepts like ‘infant mortality’ and 'bathtub curves' are not new to semiconductor design, but they largely dropped out of sight as methodologies and EDA tools improved. To get past infant mortality, a burn-in process would be done, particularly for memories. And for reliability, which... » read more