A research paper titled “HexaMesh: Scaling to Hundreds of Chiplets with an Optimized Chiplet Arrangement” was published by researchers at ETH Zurich and University of Bologna.
Abstract:
“2.5D integration is an important technique to tackle the growing cost of manufacturing chips in advanced technology nodes. This poses the challenge of providing high-performance inter-chiplet interconnects (ICIs). As the number of chiplets grows to tens or hundreds, it becomes infeasible to hand-optimize their arrangement in a way that maximizes the ICI performance. In this paper, we propose HexaMesh, an arrangement of chiplets that outperforms a grid arrangement both in theory (network diameter reduced by 42%; bisection bandwidth improved by 130%) and in practice (latency reduced by 19%; throughput improved by 34%). MexaMesh enables large-scale chiplet designs with high-performance ICIs.”
Find the technical paper here. Published November 2022.
Citation: Iff, Patrick, et al. “HexaMesh: Scaling to Hundreds of Chiplets with an Optimized Chiplet Arrangement.” arXiv preprint arXiv:2211.13989 (2022).
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