tag: University of Bologna

Open-Source, Chiplet-Compatible RISC-V Controller
By Technical Paper Link - 22 Oct, 2024 - Comments: 0

A new technical paper titled "ControlPULPlet: A Flexible Real-time Multi-core RISC-V Controller for 2.5D Systems-in-package" was published by researchers at ETH Zurich and University of Bologna. Abstract "The increasing complexity of real-time control algorithms and the trend toward 2.5D technology necessitate the development of scalable controllers for managing the complex, integrated oper... » read more

Chip Industry Technical Paper Roundup: May 21
By Linda Christensen - 21 May, 2024 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=227 /] More ReadingTechnical Paper Library home » read more

Competitive Open-Source EDA Tools
By Technical Paper Link - 19 May, 2024 - Comments: 0

A technical paper titled “Basilisk: Achieving Competitive Performance with Open EDA Tools on an Open-Source Linux-Capable RISC-V SoC” was published by researchers at ETH Zurich and University of Bologna. Abstract: "We introduce Basilisk, an optimized application-specific integrated circuit (ASIC) implementation and design flow building on the end-to-end open-source Iguana system-on-chip (... » read more

Chip Industry Technical Paper Roundup: Feb. 13
By Liz Allan - 13 Feb, 2024 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=197 /] More ReadingTechnical Paper Library home » read more

Modeling And Analyzing Open-Source SoCs For Low-Power Cyber-Physical Systems
By Technical Paper Link - 08 Feb, 2024 - Comments: 0

A technical paper titled “TOP: Towards Open & Predictable Heterogeneous SoCs” was published by researchers at University of Bologna, ETH Zurich, and University of California San Diego. Abstract: "Ensuring predictability in modern real-time Systems-on-Chip (SoCs) is an increasingly critical concern for many application domains such as automotive, robotics, and industrial automation. An... » read more

Technical Paper Roundup: November 28
By Linda Christensen - 28 Nov, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=169 /] More Reading Technical Paper Library home » read more

A Fast And Unified Toolchain For Rapid Design Space Exploration Of Chiplet Architectures
By Technical Paper Link - 27 Nov, 2023 - Comments: 0

A technical paper titled “RapidChiplet: A Toolchain for Rapid Design Space Exploration of Chiplet Architectures” was published by researchers at ETH Zurich and University of Bologna. Abstract: "Chiplet architectures are a promising paradigm to overcome the scaling challenges of monolithic chips. Chiplets offer heterogeneity, modularity, and cost-effectiveness. The design space of chiplet ... » read more

Fast Interrupt Extension For MCU RISC-V
By Technical Paper Link - 20 Nov, 2023 - Comments: 0

A technical paper titled “CV32RT: Enabling Fast Interrupt and Context Switching for RISC-V Microcontrollers” was published by researchers at ETH Zurich and University of Bologna. Abstract: "Processors using the open RISC-V ISA are finding increasing adoption in the embedded world. Many embedded use cases have real-time constraints and require flexible, predictable, and fast reactive handl... » read more

Chip Industry’s Technical Paper Roundup: Sept 19
By Liz Allan - 19 Sep, 2023 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=141 /] More Reading Technical Paper Library home » read more

A Hierarchical Instruction Cache Tailored To Ultra-Low-Power Tightly-Coupled Processor Clusters
By Technical Paper Link - 15 Sep, 2023 - Comments: 0

A technical paper titled “Scalable Hierarchical Instruction Cache for Ultra-Low-Power Processors Clusters” was published by researchers at University of Bologna, ETH Zurich, and GreenWaves Technologies. Abstract: "High Performance and Energy Efficiency are critical requirements for Internet of Things (IoT) end-nodes. Exploiting tightly-coupled clusters of programmable processors (CMPs) ha... » read more

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