An Update On The IEEE 1801-2013 Unified Power Format Standard

UPF 3.0 attention is focused on a higher level of design abstraction, possibly with early modeling and estimation.

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It’s been almost six years since the first IEEE 1801 standard was officially published in March of 2009, but the standard can trace its roots back to years before that date. On May 30, 2013 the IEEE released a press announcement for the most recent version of the standard, IEEE 1801-2013 (a.k.a. UPF 2.1). This brought forward a standard for the industry that is finally backed by all of the major EDA vendors and it was briefly discussed in an earlier blog. As was mentioned then, the attention has moved higher up in the design abstraction space with early modeling and estimation possibly being a key aspect of a future UPF (3.0) standard.

To follow up on an October blog in Semiconductor Engineering, two new working groups have been created to specifically focus on higher abstraction levels; P2415 and P2416.

The P2415 Standard for Unified Hardware Abstraction and Layer for Energy Proportional Electronic Systems working group is chaired by Vojin Zivojnovic of AGGIOS. The group held its first meeting on Nov. 13 and 14 in Mountain View, CA. The 2415 standard group is focusing on defining the syntax and semantics for an energy oriented description of hardware, software and power management for electronic systems. From information posted on the working group’s site, the new standard will enable “specifying, modeling, verifying, designing, managing, testing and measuring the energy features of the device, covering both the pre- and post-silicon design flow. On the hardware side the description covers enumeration of semiconductor intellectual property components (System on Chip, board, device), memory map, bus structure, interrupt logic, clock and reset tree, operating states and points, state transitions, energy and power attributes; on the software side the description covers software activities and events, scenarios, external influences (including user input) and operational constraints; and on the power management side the description covers activity dependent energy control.” The goal is a standard that will be complementary to functional models written in VHDL/Verilog/SystemVerilog and SystemC and compatible with current and future IEEE 1801 (UPF) standards.

The P2416 Power Modeling: Standard for Enabling System Level Analysis is chaired by Nagu Dhanwada of IBM. The group held its first meeting on Nov. 4 in Sunnyvale, CA. This working group is focusing on a standard for software and hardware IP-centric power analysis and optimization based on a meta-model for parameterization and abstraction. From information posted on the working group’s site, the new standard will define “concepts for the development of parameterized, accurate, efficient and complete power models for systems and hardware IP blocks usable for system power analysis and optimization. These concepts include, but are not limited to, process, voltage and temperature (PVT) independence, power and thermal management interface, workload and architecture parameterization. Such models are suitable for use in software development flows and hardware design flows, as well as representing both pre-silicon estimated and post-silicon measured data. Beyond defining the concepts and related standard requirements, the proposed specification recommends the use of other relevant design flow standards (e.g. IP-XACT) with the objective of enabling more complete and usable power-aware design flows.” As with P2415, the standard is intended to work with UPF, SystemC, SystemVerilog and possibly other languages and standards.

Progress on UPF 3.0 also continues and the IEEE 1801working group is chaired by John Biggs of ARM and vice-chaired by Erich Marschner of Mentor Graphics. The current plans are for UPF 3.0 to continue to build on successive refinement, especially in regards to power states and transitions. An API and information model that offers a more complete and well-defined access also looks to be in the offering. Component power modeling for better system level power analysis is another area being given serious consideration for the new version of the standard. Of course, nothing is final until the formal process of certifying the standard has been completed. For readers who are interested in finding our more about the current IEEE-1801-2013 standard, the IEEE has also made a free copy available for personal use.

I’ve corresponded with Vojin, Nagu and Erich, as well as Yatin Trevidi from Synopsys and John Redmond from Broadcom, and it’s expected that more information will be forthcoming soon and hopefully also at DAC later this year. As the new working groups continue to gather momentum, interested readers are encouraged to follow the links in this article and contact the respective chairs for more information.