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ML-Based Framework for Automatically Generating Hardware Trojan Benchmarks
By Technical Paper Link - 25 Aug, 2022 - Comments: 0

A new technical paper titled "Automatic Hardware Trojan Insertion using Machine Learning" was published by researchers at University of Florida and Stanford University. Abstract (partial): "In this paper, we present MIMIC, a novel AI-guided framework for automatic Trojan insertion, which can create a large population of valid Trojans for a given design by mimicking the properties of a small... » read more

Finding the Scope of CXL-Enabled Tiered Memory System in Production
By Technical Paper Link - 25 Aug, 2022 - Comments: 0

This new technical paper titled "TPP: Transparent Page Placement for CXL-Enabled Tiered Memory" is presented by researchers at University of Michigan and Meta Inc. Abstract (partial) "We propose a novel OS-level application-transparent page placement mechanism (TPP) for efficient memory management. TPP employs a lightweight mechanism to identify and place hot and cold pages to appropriate... » read more

Costs of Static HW Partitioning on RISC-V
By Technical Paper Link - 25 Aug, 2022 - Comments: 0

A new technical paper titled "Static Hardware Partitioning on RISC-V -- Shortcomings, Limitations, and Prospects" was published by researchers at Technical University of Applied Sciences (Regensburg, Germany) and Siemens AG (Corporate Research). Abstract "On embedded processors that are increasingly equipped with multiple CPU cores, static hardware partitioning is an established means of c... » read more

Novel In-Pixel-in-Memory (P2M) Paradigm for Edge Intelligence (USC)
By Technical Paper Link - 24 Aug, 2022 - Comments: 0

A new technical paper titled "A processing-in-pixel-in-memory paradigm for resource-constrained TinyML applications" was published by researchers at University of Southern California (USC). According to the paper, "we propose a novel Processing-in-Pixel-in-memory (P2M) paradigm, that customizes the pixel array by adding support for analog multi-channel, multi-bit convolution, batch normaliza... » read more

Training a Quantum Neural Network Requires Only A Small Amount of Data
By Technical Paper Link - 24 Aug, 2022 - Comments: 0

A new research paper titled "Generalization in quantum machine learning from few training data" was published by researchers at Technical University of Munich, Munich Center for Quantum Science and Technology (MCQST), Caltech, and Los Alamos National Lab. “Many people believe that quantum machine learning will require a lot of data. We have rigorously shown that for many relevant problems,... » read more

Effects of Size Scaling and Device Architecture on the Radiation Response of Nanoscale MOS Transistors
By Technical Paper Link - 24 Aug, 2022 - Comments: 0

A new technical paper titled "Perspective on radiation effects in nanoscale metal–oxide–semiconductor devices" was published by a researcher at Vanderbilt University, Nashville, Tennessee. The work was partially supported by the Defense Threat Reduction Agency and by the U.S. Air Force Office of Scientific Research and Air Force Research Laboratory. According to the paper, "this Perspect... » read more

State Of The Art And Recent Progress of Reconfigurable Electronic Devices Based on 2D Materials
By Technical Paper Link - 24 Aug, 2022 - Comments: 0

A new technical paper titled "Emerging reconfigurable electronic devices based on two-dimensional materials: A review" was just published by researchers at TU Dresden, NaMLAb gGmbH, and RWTH Aachen University. Abstract "As the dimensions of the transistor, the key element of silicon technology, are approaching their physical limits, developing semiconductor technology with novel concepts an... » read more

Polynesia, A Novel Hardware/Software Cooperative Design for In-Memory HTAP Databases
By Technical Paper Link - 22 Aug, 2022 - Comments: 0

A team of researchers from ETH Zurich, Google and Univ. of Illinois Urbana-Champaign recently published a technical paper titled "Polynesia: Enabling High-Performance and Energy-Efficient Hybrid Transactional/Analytical Databases with Hardware/Software Co-Design". Abstract (partial) "We propose Polynesia, a hardware–software co-designed system for in-memory HTAP [hybrid transactional/anal... » read more

Beyond 5nm: Review of Buried Power Rails & Back-Side Power
By Technical Paper Link - 19 Aug, 2022 - Comments: 0

A new technical paper titled "A Holistic Evaluation of Buried Power Rails and Back-Side Power for Sub-5 nm Technology Nodes" is presented by researchers at UT Austin, Arm Research, and imec. Find the technical paper here. Published July 2022. S. S. T. Nibhanupudi et al., "A Holistic Evaluation of Buried Power Rails and Back-Side Power for Sub-5 nm Technology Nodes," in IEEE Transactions... » read more

DNN-Opt, A Novel Deep Neural Network (DNN) Based Black-Box Optimization Framework For Analog Sizing
By Technical Paper Link - 19 Aug, 2022 - Comments: 0

This technical paper titled "DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks" is co-authored from researchers at The University of Texas at Austin, Intel, University of Glasgow. The paper was a best paper candidate at DAC 2021. "In this paper, we present DNN-Opt, a novel Deep Neural Network (DNN) based black-box optimization framework for analog sizi... » read more

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