Author's Latest Posts

Forward Body Biasing in Bulk Cryo-CMOS With Negligible Leakage (TU Delft)
By Technical Paper Link - 20 Dec, 2023 - Comments: 0

A new technical paper titled "Cryogenic-Aware Forward Body Biasing in Bulk CMOS" was published by researchers at QuTech, Tu Delft. Abstract "Cryogenic CMOS (cryo-CMOS) circuits are often hindered by the cryogenic threshold-voltage increase. To mitigate such an increase, a forward body biasing (FBB) technique in bulk CMOS is proposed, which can operate up to the nominal supply without prob... » read more

Hardware-Based Methodology To Protect AI Accelerators
By Technical Paper Link - 13 Dec, 2023 - Comments: 0

A technical paper titled “A Unified Hardware-based Threat Detector for AI Accelerators” was published by researchers at Nanyang Technological University and Tsinghua University. Abstract: "The proliferation of AI technology gives rise to a variety of security threats, which significantly compromise the confidentiality and integrity of AI models and applications. Existing software-based so... » read more

A Survey Of Recent Advances In Spiking Neural Networks From Algorithms To HW Acceleration
By Technical Paper Link - 13 Dec, 2023 - Comments: 0

A technical paper titled “Recent Advances in Scalable Energy-Efficient and Trustworthy Spiking Neural networks: from Algorithms to Technology” was published by researchers at Intel Labs, University of California Santa Cruz, University of Wisconsin-Madison, and University of Southern California. Abstract: "Neuromorphic computing and, in particular, spiking neural networks (SNNs) have becom... » read more

Dual Instruction-Set Architecture, Supporting A TTA And RISC-V Instruction Set Via a Lightweight Microcode Hardware Unit
By Technical Paper Link - 13 Dec, 2023 - Comments: 0

A technical paper titled “Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode” was published by researchers at Tampere University. Abstract: "Transport triggered architectures (TTAs) follow the static programming model of very long instruction word (VLIW) processors but expose additional information of the processor datapath in the programming interface, whic... » read more

A Framework For Improving Current Defect Inspection Techniques For Advanced Nodes
By Technical Paper Link - 12 Dec, 2023 - Comments: 0

A technical paper titled “Improved Defect Detection and Classification Method for Advanced IC Nodes by Using Slicing Aided Hyper Inference with Refinement Strategy” was published by researchers at Ghent University, imec, and SCREEN SPE. Abstract: "In semiconductor manufacturing, lithography has often been the manufacturing step defining the smallest possible pattern dimensions. In recent ... » read more

More Efficient Side-Channel Analysis By Applying Two Deep Feature Loss Functions
By Technical Paper Link - 12 Dec, 2023 - Comments: 0

A technical paper titled “Beyond the Last Layer: Deep Feature Loss Functions in Side-channel Analysis” was published by researchers at Nanyang Technological University, Radboud University, and Delft University of Technology. Abstract: "This paper provides a novel perspective on improving the efficiency of side-channel analysis by applying two deep feature loss functions: Soft Nearest Neig... » read more

A Polymer-Free Technique For Assembling Van Der Waals Heterostructures Using Flexible Si Nitride Membranes
By Technical Paper Link - 12 Dec, 2023 - Comments: 0

A technical paper titled “Clean assembly of van der Waals heterostructures using silicon nitride membranes” was published by researchers at University of Manchester, Imperial College London, National Institute for Materials Science (Japan), and University of Lancaster. Abstract Van der Waals heterostructures are fabricated by layer-by-layer assembly of individual two-dimensional mater... » read more

2D Computing Magnets For Temperatures Up To 170-Degrees Fahrenheit
By Technical Paper Link - 12 Dec, 2023 - Comments: 0

A technical paper titled “Magnetic properties of intercalated quasi-2D Fe3-xGeTe2 van der Waals magnet” was published by researchers at University of Texas at El Paso, National Institute of Standards and Technology (NIST), University of Edinburgh, Donostia International Physics Centre (DIPC), Hampton University, and Brookhaven National Laboratory. Abstract: "Among several well-kno... » read more

Designing Low Power Radar Processors
By Technical Paper Link - 12 Dec, 2023 - Comments: 0

A technical paper titled “Ellora: Exploring Low-Power OFDM-based Radar Processors using Approximate Computing” was published by researchers at University of California Irvine, University of Wisconsin-Madison, and TCS Research. Abstract: "In recent times, orthogonal frequency-division multiplexing (OFDM)-based radar has gained wide acceptance given its applicability in joint radar-communic... » read more

Enabling Scalable Accelerator Design On Distributed HBM-FPGAs (UCLA)
By Technical Paper Link - 06 Dec, 2023 - Comments: 0

A technical paper titled “TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs” was published by researchers at University of California Los Angeles. Abstract: "Despite the increasing adoption of Field-Programmable Gate Arrays (FPGAs) in compute clouds, there remains a significant gap in programming tools and abstractions which can leverage network-connected, cloud-scale... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy