Author's Latest Posts


Rowhammer Attack On NVIDIA GPUs With GDDR6 DRAM (University of Toronto)


A new technical paper titled "GPUHammer: Rowhammer Attacks on GPU Memories are Practical" was published by researchers at University of Toronto. Abstract: "Rowhammer is a read disturbance vulnerability in modern DRAM that causes bit-flips, compromising security and reliability. While extensively studied on Intel and AMD CPUs with DDR and LPDDR memories, its impact on GPUs using GDDR memorie... » read more

Examination Of Thermal Issues Related to Hybrid Bonding of 3D-Stacked HBM


A new technical paper titled "Thermal Issues Related to Hybrid Bonding of 3D-Stacked High Bandwidth Memory: A Comprehensive Review" was published by researchers at Chungbuk National University. Abstract "High-Bandwidth Memory (HBM) enables the bandwidth required by modern AI and high-performance computing, yet its three dimensional stack traps heat and amplifies thermo mechanical stress. We... » read more

Volatile And Non-Volatile NEM Switches Fabricated In A CMOS-Compatible SOI Foundry Platform (KTH, U. of Bristol, EPFL, Imec)


A new technical paper titled "Volatile and non-volatile nano-electromechanical switches fabricated in a CMOS-compatible silicon-on-insulator foundry process" was published by researchers at KTH Royal Institute of Technology, University of Bristol, EPFL, imec, and Ghent University. Abstract "Nanoelectromechanical (NEM) switches have the advantages of zero leakage current, abrupt switching ch... » read more

Physics-Based ASICs (Normal Computing et al.)


A new technical paper titled "Solving the compute crisis with physics-based ASICs" was published by researchers at Normal Computing Corporation, ARIA, UC Santa Barbara, University of Pennsylvania, Santa Fe Institute, Cornell University. Advanced Research Projects Agency - Energy and Yale University. Abstract "Escalating artificial intelligence (AI) demands expose a critical "compute crisis"... » read more

Analysis of RISC-V CPU Fuzzers via Automatic Bug Injection (ETH Zurich)


A new technical paper titled "Encarsia: Evaluating CPU Fuzzers via Automatic Bug Injection" was published by researchers at ETH Zurich. Abstract "Hardware fuzzing has recently gained momentum with many discovered bugs in open-source RISC-V CPU designs. Comparing the effectiveness of different hardware fuzzers, however, remains a challenge: each fuzzer optimizes for a different metric and ... » read more

Three Methods For Improving Planarization For Diverse Layouts In Advanced Nodes (Fraunhofer IPMS)


A new technical paper titled "Reduced Topography After Stop on Nitride (SON) STI CMP Through Improved Post-Bulk Planarity for Diverse Layouts in Advanced Nodes" was published by researchers at Fraunhofer IPMS. Abstract "Three methods for improving planarization in a ceria free, two step STI CMP process were investigated using patterned test wafers representing 2X nm technology. It was found... » read more

Photonic SRAM Facilitating Electro-Optic Data Storage For Ultra-Fast IMC (UW-Madison, USC)


A new technical paper titled "X-pSRAM: A Photonic SRAM with Embedded XOR Logic for Ultra-Fast In-Memory Computing" was published by researchers at University of Wisconsin–Madison and USC. Abstract "Traditional von Neumann architectures suffer from fundamental bottlenecks due to continuous data movement between memory and processing units, a challenge that worsens with technology scaling ... » read more

Co-Designing Data Center Architecture To Support LLMs (Intel, Georgia Tech)


A new technical paper titled "Scaling Intelligence: Designing Data Centers for Next-Gen Language Models" was published by Intel Corporation and Georgia Tech. An excerpt from the paper's abstract: "Our work provides a comprehensive co-design framework that jointly explores FLOPS, HBM bandwidth and capacity, multiple network topologies (two-tier vs. FullFlat optical), the size of the scale-ou... » read more

GAA Transistors: 3D Atomic-Scale Metrology of Strain Relaxation and Roughness via Electron Ptychography (Cornell, ASM, TSMC)


A new technical paper titled "3D Atomic-Scale Metrology of Strain Relaxation and Roughness in Gate-All-Around (GAA) Transistors via Electron Ptychography" was published by researchers at Cornell University, ASM and TSMC. Abstract "To improve transistor density and electronic performance, next-generation semiconductor devices are adopting three-dimensional architectures and feature sizes dow... » read more

Colloidal Coordination Nanosheets, And Their Use as Inks For Coating (Tokyo University of Science)


A new technical paper titled "Rationally Engineered Heterometallic Metalladithiolene Coordination Nanosheets with Defined Atomic Arrangements" was published by researchers at Tokyo University of Science. Abstract "Coordination nanosheets are 2D polymers formed by coordination bonds between metal ions and planar organic molecules. They offer high molecular design freedom and unique electroni... » read more

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