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Intrusion Detection Approach for DoS Attacks on Automotive CAN bus (Dumarey Softronix, Politecnico di Torino)
By Technical Paper Link - 30 Jul, 2025 - Comments: 0

A new technical paper titled "CANDoSA: A Hardware Performance Counter-Based Intrusion Detection System for DoS Attacks on Automotive CAN bus" was published by researchers at Dumarey Softronix and Politecnico di Torino. Abstract "The Controller Area Network (CAN) protocol, essential for automotive embedded systems, lacks inherent security features, making it vulnerable to cyber threats, espe... » read more

Computer Architecture Extending The Von Neumann Model With A Dedicated Reasoning Unit For Native Artificial General Intelligence (TU Munich, Pace U.)
By Technical Paper Link - 23 Jul, 2025 - Comments: 0

A new technical paper titled "Augmenting Von Neumann's Architecture for an Intelligent Future" was published by researchers at TU Munich and Pace University. Abstract "This work presents a novel computer architecture that extends the Von Neumann model with a dedicated Reasoning Unit (RU) to enable native artificial general intelligence capabilities. The RU functions as a specialized co-proc... » read more

Largest High-Quality Verilog Dataset for LLM Fine-Tuning (Univ. of Florida)
By Technical Paper Link - 22 Jul, 2025 - Comments: 0

A new technical paper titled "VerilogDB: The Largest, Highest-Quality Dataset with a Preprocessing Framework for LLM-based RTL Generation" was published by researchers at the University of Florida. Abstract "Large Language Models (LLMs) are gaining popularity for hardware design automation, particularly through Register Transfer Level (RTL) code generation. In this work, we examine the curr... » read more

Fault-Free Matrix for Analog Hardware (The Univ. of Hong Kong, Univ. of Oxford, Hewlett Packard Labs)
By Technical Paper Link - 22 Jul, 2025 - Comments: 0

A new technical paper titled "Fault-Free Analog Computing with Imperfect Hardware" was published by researchers at The University of Hong Kong, University of Oxford, and Hewlett Packard Labs. Abstract "The surging demand for computational power, particularly for edge computing and AI, drives research into alternative paradigms like analog in-memory computing using memristors. These approach... » read more

Overview Of Thin-Film Lithium Niobate Quantum Photonics (TU Denmark)
By Technical Paper Link - 22 Jul, 2025 - Comments: 0

A new technical paper titled "Thin-film lithium niobate quantum photonics: review and perspectives" was published by researchers at the Technical University of Denmark. Abstract "Photonics has proven to be a very attractive platform for quantum technologies, offering key features such as high-fidelity qubits and room-temperature signal processing. Advancements in integrated photonics are ex... » read more

Tag-Based Memory Verification System for RISC-V (Inha Univ., Intel Labs et al.)
By Technical Paper Link - 22 Jul, 2025 - Comments: 0

A new technical paper titled "Efficient Hardware-Assisted Heap Memory Safety for Embedded RISC-V Systems" was published by researchers at Inha University, Intel Labs, Electronics and Telecommunications Research Institute, and Korea National University of Education. Abstract "In recent years, memory safety issues in embedded environments have garnered significant attention, with spatial and ... » read more

HW/SW Co-Design Toolset for RISC-V (Tampere Univ.)
By Technical Paper Link - 21 Jul, 2025 - Comments: 0

A new technical paper titled "Automatically Retargeting Hardware and Code Generation for RISC-V Custom Instructions" was published by researchers at the Tampere University. Abstract "Custom instruction (CI) set extensions are beneficial for increasing performance and energy efficiency in a set of target applications. For rapid prototyping of these types of application-specific processors, d... » read more

Efficient Failure-Detection Methods for GPU Control-Logic (Hitachi, Osaka Univ., Kyoto Univ.)
By Technical Paper Link - 21 Jul, 2025 - Comments: 0

A new technical paper titled "A Hardware-Aware Failure-Detection Method for GPU Control-Logic" was published by researchers at Hitachi, Ltd., Osaka University, and Kyoto University. Excerpt "Various failure detection methods have been proposed for SDCs caused by faults in data units such as registers. However, effective methods for detecting SDCs resulting from faults in control logic, such... » read more

DL Compiler Framework For More Efficient Inter-Core Connected AI Chips (UIUC, Microsoft)
By Technical Paper Link - 21 Jul, 2025 - Comments: 0

A new technical paper titled "Elk: Exploring the Efficiency of Inter-Core Connected AI Chips with Deep Learning Compiler Techniques" was published by researchers at the University of Illinois Urbana-Champaign (UIUC) and Microsoft Research. Abstract "To meet the increasing demand of deep learning (DL) models, AI chips are employing both off-chip memory (e.g., HBM) and highbandwidth low-laten... » read more

Skeletal Security Architecture For Providing Systematic Security Insertion And Assurance In SoC Designs (University of Florida)
By Technical Paper Link - 21 Jul, 2025 - Comments: 0

A new technical paper titled "Security Enclave Architecture for Heterogeneous Security Primitives for Supply-Chain Attacks" was published by researchers at the University of Florida. Abstract: "Designing secure architectures for system-on-chip (SoC) platforms is a highly intricate and time intensive task, often requiring months of development and meticulous verification. Even minor architec... » read more

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