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Blog Review: July 13

Curvilinear masks; rigid-flex interconnects; fixing yield problems; Arm synchronization.

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Siemens’ John Sturtevant finds that the patterning requirements of next generation lithographic processes have pushed lithographers to explore the advantages of curvilinear masks, and notes some of the tools coming along to help.

Cadence’s Paul McLellan learns from Kyle Chen of Microsoft and Suomin Cui of Cadence how deep learning and electromagnetic solvers can be used to optimize high-density interconnects in multi-layer rigid-flex printed circuits.

Synopsys’ Randy Fish and Guy Cortez discuss a collaboration with Advantest to find and fix yield problems earlier in the process by enable real-time data streaming from test floors distributed across the semiconductor supply chain to analytics platforms hosted by chipmakers.

Arm’s Ker Liu explains the synchronization approach on the Arm architecture, including atomic instructions, Arm memory ordering, and data access barrier instructions, along with a look at typical use cases.

Ansys’ Matt Adams and Vitor Lopes check out how hybrid digital twins merge design knowledge from simulation with field behavior from data to enable real-time monitoring, predictive maintenance, and performance optimization.

ESD Alliance’s Bob Smith chats with Vikram Bhatia of Synopsys about the pay-per-use approach to providing EDA software on the cloud, changing license models, and what software vendors will need to provide to make it successful.

A Rambus writer chats with Justin Endo of Mixel about key drivers for MIPI and I3C beyond mobile phones, and upcoming trends in the IP industry.

Plus, check out the blogs featured in the latest Automotive, Security, & Pervasive Computing and Test, Measurement, & Analytics newsletters:

Arteris IP’s Stefano Lorenzini shows how to simplify the integration of configurable IP into safety-critical systems.

Synopsys’ Ron Lowman explains how benchmarks can guide implementation of AI compression techniques without unduly impacting accuracy.

Riscure’s Marc Witteman warns that convenience features create security problems.

Flex Logix’ Andy Jaros lays out how to eliminate additional packaging and SerDes costs by integrating FPGA into an SoC.

Infineon’s Danie Schneider offers a way to avoid making mission-critical decisions based on manipulated data.

Cadence’s John Chawner looks at increasing thrust without increasing a drone’s footprint.

Cycuity’s Andreas Kuehlmann recognizes that hardware security practices have existed for decades, but sees a new urgency to act upon them.

Siemens DISW’s Matthew Walsh reviews a response to the ongoing threat of cybersecurity attacks.

Onto Innovation’s Miki Banatwala looks at how moving to the cloud can bring about company-wide transformations, and what it takes to be successful.

Teradyne’s David Ducrocq shows the impact a technical project lead can have on that project’s success.

Synopsys’ Ash Patel examines ATE data transfer rates for PCIe and USB.

Siemens’ Richard Oxland applies product lifecycle management principles to the semiconductor value chain.



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