Blog Review: July 18

DFI 5.0; embedded security; MEMS & sensors growth; sensor fusion.


Synopsys’ Shivani Bansal introduces DFI 5.0, the latest interface specification that defines signals, timing, and functionality required for efficient communication between the memory controller and PHY, including changes to boost performance in DDR5/LPDDR5.

Mentor’s Ricardo Anguiano contends that for greater autonomy in vehicles, centralized sensor fusion is necessary to both reduce the cost of systems and improve their safety and functionality.

Cadence’s Meera Collier checks out Narrowband IoT (NB-IoT), the proposed low-power wide-area network that promises significantly improved power consumption for devices, and the areas where it could see adoption.

Intel’s Ron Wilson digs into the state of security in embedded systems and cautions that as they gain connectivity and begin to look more like miniaturized enterprise data centers, a robust hardware security module is a necessity.

Arm’s Nathan Chong explains a key challenge in concurrent programming and how transactions and weak memory play a role.

Yole Développement’s Amandine Pizzagalli and Emilie Jolivet note a growing demand for “More than Moore” devices, such as MEMS, sensors, and power devices, which are expected to see wafer demand increase almost 10% by 2023 thanks to 5G and mobility.

Rambus’ Aharon Etengoff reviews some of the major data breaches retailers have recently suffered and notes that the limited nature of some breaches is unlikely to make companies take up their customer’s security as a greater priority.

Eindhoven University of Technology’s Bert Blocken takes a look at just how effective riding in a peloton, or large group, is for racing cyclists in the biggest sports simulation yet.

For more good reading, check out the featured blogs from the latest Low Power-High Performance and Packaging, Test & Materials newsletters:

Editor In Chief Ed Sperling questions how much energy billions of complex devices will require.

Mentor’s Progyna Khondkar explains how to make debug more efficient with power-aware static checks.

Moortec’s Ramsay Allen points to two techniques for optimizing in-chip conditions.

Synopsys’ Ron DiGiuseppe shows how to meet safety requirements for changing automotive SoC architectures.

Arm’s Jakub Lamik looks at which capabilities consumers are expecting in the next generation of mobile devices.

Editor In Chief Ed Sperling zeroes in on why simulating autonomous vehicles is so difficult.

Technical Editor Katherine Derbyshire finds enormous potential for new chip materials, but only with a better understanding of relationships between processing, mechanical structure and electrical properties.

Advantest’s Judy Davies contends that an influx of new ideas and participants is vital to the rapid pace of semiconductor innovation.

Brewer Science’s Tim Limmer shows how to handle potential process or product errors before they occur by taking advantage of accumulated knowledge.

Technology Editor Jeff Dorsch sits down with National Instruments executives to discuss chip testing.

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