Blog Review: July 4

New architectures need new materials; state of chip integration; EUV inspection and metrology.

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Applied Materials’ Sundeep Bajikar argues that to get the full benefits of AI, new computing architectures are needed – and that will require new breakthroughs in materials engineering to get beyond classic 2D scaling.

Cadence’s Tom Wong considers to what extent chip dis-integration is happening and how the industry can cope with the escalating costs of new process nodes and higher-speed interface protocols.

Synopsys’ Robert Vamosi looks back at the push for autonomous vehicles and why, despite decades of rapid improvement in DARPA-sponsored challenges and from companies, we’re not there yet.

In a podcast, Mentor’s John McMillan examines schematic verification before PCB layout and shares tips on various checks that can be run in any schematic capture tool.

SEMI’s Debra Vogler chats with Neeraj Khanna of KLA-Tencor about the readiness of inspection and metrology tools for EUV applications at 5nm and 3nm.

Arm’s Daniel Bernal considers eight major trends affecting automotive software development from functional safety to greater use of open source software and the challenges that come along with them.

Rambus’ Aharon Etengoff checks out the U.S. Department of Homeland Security’s new cybersecurity guidelines and notes that the department is in a position to encourage collaboration around security standards.

Lithography blogger Chris Mack shares highlights from the “3-Beams” Electron, Ion, and Photon Beam Technology and Nanofabrication Conference, where shot noise mitigation and AI were hot topics.

Nvidia’s Isha Salian takes a look at how researchers are using neural networks to screen potential drug candidates by using the physical structure of a protein to infer what kind of molecule could bind to it.

And don’t forget to catch up on the blogs from last week’s System-Level Design newsletter:

Editor In Chief Ed Sperling observes that reliability is no longer about one chip, or even one device.

Technology Editor Brian Bailey questions whether engineers find comfort in details as they get older, and whether abstraction is for younger minds.

Mentor’s Ashish Hari, Aditya Vij and Ping Yeung show how the CDC intent of any block can be turned into a data model that can be seamlessly re-used across designs.

OneSpin’s Tom Anderson looks at why it took the industry so long to become comfortable with cloud-based tools.

Aldec’s Farhad Fallahlalehzari shows how verifying the interaction between programmable logic and processing earlier in the design cycle pays benefits in time and cost.

eSilicon’s Mike Gianfagna points to the benefits of utilizing IP that is relevant to a pre-specified chip architecture for boosting design productivity.

Cadence’s Frank Schirrmeister zeroes in on the accuracy of predictions about interoperable models and designing in the cloud.



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