Blog Review: May 31

PSS in ATE; UFS 4.0; power module cooling; Matter updates.


Cadence’s Moshik Rubin looks at how the Portable Test and Stimulus Standard (PSS) is finding new use cases in ATE production test by enabling creation of a rich set of functional test scenarios in a reusable way.

Synopsys’ LJ Chen and Dana Neustadter check out the latest version of the Universal Flash Storage (UFS) standard, which doubles the data transfer rate of the preceding UFS 3.1 solution to up to 2900 MBps per lane and includes data encryption and Replay Protected Memory Block.

Siemens’ Wilfried Wessel answers six common questions about power module cooling, including uneven device temperatures, thermal interface material, and placement optimization.

Infineon’s Skip Ashton looks at improvements the Matter 1.1 specification update brings for developers and device makers, including enhancements to the test harness and test automation for smart home devices.

Arm’s Pablo Barrio checks out new functionality in LLVM 16 such as function multi-versioning and full support for strict floating point, along with improvements to several existing features and new architecture and CPU support.

Ansys’ Laila Salman considers the myriad interconnected 5G antenna design challenges and how multiphysics simulation can play a role in antenna design, verification and testing, and deployment.

Renesas’ Masaki Hama points to three major cybersecurity measures that need to be implemented for IoT devices.

SEMI’s Tim Brosnihan chats with Sondra Hellstrom of Bosch about the role of environmental sensors in air quality monitoring, their limitations, and where they could be deployed effectively.

And don’t miss the blogs featured in the latest Systems & Design newsletter:

Technology Editor Brian Bailey contends that while the industry claims to be concerned about power, it only does so for secondary reasons, and massive levels of waste go unaddressed.

Siemens’ Patrick Carrier explains why understanding current distribution is essential to minimize waste and avoid overdesigned via arrays.

Movellus’ Barry Pangrle points to supercomputer rankings to see efficiency and performance gains.

Cadence’s Paul McLellan looks at technology transitions from NMOS to gate-all-around.

Expedera’s Paul Karazuba digs into power consumption, latency, and privacy concerns for NPUs included in application processors.

Renesas’ Kayoko Nemoto sees the exponential growth of Internet traffic in industrial automation shortening the life cycle of core networking technologies.

Codasip’s Mike Eftimakis examines combining different levels of configuration and customization to meet PPA goals.

NI’s Alejandro Escobar Calderon and Gerardo Orozco lay out the tradeoffs for moving more data at higher wireless frequencies.

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