Blog Review: Nov. 12

Software-defined networking; verification’s storm; money and the IoT; Internet mind control; IP and EDA; analytics; biometric handwriting; white hat hackers.


ARM’s Eoin McCann provides a primer to software-defined networking, which uses a higher level of abstraction to create a centralized controller. This is a new twist on networking—with a bit of deja vu thrown in.

Mentor’s Matthew Ballance points to a perfect storm for verification—shrinking features, more layers and more embedded processors. He has some tips for how to deal with all of this added complexity.

Cadence’s Seow Yin Lim asks a very timely question (paraphrased here): Who’s going to make money from the IoT? Answer: Everyone. And that includes hardware companies.

Ansys’ Bill Vandermark has found something truly scary: Being able to use person’s brain to control another person’s hand over the Internet. You can almost guarantee this will find its way into a sci-fi movie—or a courtroom.

Sonics’ Randy Smith observes that IP is EDA. It would be much tougher to argue the reverse.

Synopsys’ Marc Greenberg examines Dell’s newest computer lineup, from desktop to server, and finds that after years of promises DDR4 has finally gone mainstream.

Rambus’ Aharon Etengoff dives into big data and why analytics become so important in the IoT world. But what happens when the analytics get overloaded? Will we need analytics for analytics?

NXP’s Thomas Suwald digs into smartcard security and why biometrics are so important. Get ready for biometric handwriting.

Also on the subject of security, The White House’s Meredith Lee, Rafael Lemaitre and Brian Forde focus on a government-sponsored hackathon for disaster response and recovery. This likely would fall into the category of white hat hacking…but you never know.

Semico Research’s Tony Massimini digs into sensor fusion and new sensor developments that are opening up opportunities, including standards efforts that will affect the IoT ecosystem.

Cadence’s Brian Fuller interviews Sigrity’s An-Yu Kuo about chip-board-package interdependencies and electrical-thermal stress. So how exactly do you solve multi-fabric, multi-physics problems?

And in case you missed last week’s Low Power-High Performance newsletter, here are some noteworthy blogs:

Executive Editor Ann Steffora Mutschler observes that the challenge for an always-on application continues to grow.

Ansys-Apache’s Annapoorna Krishnaswamy points out that what complicates SoC design is that IP is often targeted for a wide variety of applications and technology/process nodes.

Cadence’s Brian Fuller notes that just because we have more cores doesn’t mean we can use them—or at least not yet.

Rambus’ Loren Shalinsky dives into big iron numbers, the size of the problem, and how to tackle it.

Atrenta’s Mark Baker steps up to the plate on baseball and power statistics, and where there are similarities.

Nvidia’s Barry Pangrle observes that processor performance cannot increase without making energy efficiency a primary objective.

Calypto’s Annapoorna Krishnaswamy observes that what complicates SoC design is that IP often is targeted for a wide variety of applications and technology/process nodes.

Synopsys’ Mike Thompson writes that it’s a challenge to improve performance in a shrinking power budget.

Mentor Graphics’ Joe Hupcey identifies gotchas and hidden problems in SoC clock domain crossings.

ARM’s Christopher Seidl looks into better software and all the various pieces that are involved.

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