Blog Review: Oct. 14

Arm’s Hongsup Shin explains a machine learning application that can determine which tests are most likely to find hardware bugs, improving efficiency and reducing the number of tests that need to be run.

Synopsys’ Pieter van der Wolf and Dmitry Zakharov take a look at the increasing need for low power processors optimized for machine learning tasks as IoT, smart home, and wearable devices proliferate.

Mentor’s Alex Belelovsky considers why manufacturers make tweaks to board designs, the risks involved, and the importance of transparency.

Cadence’s Paul McLellan listens in on what’s new with Arm’s latest projects and a discussion between the CEOs of Nvidia and Arm about the impending acquisition.

Ansys’ Ushemadzoro Chipengo digs into how simulation can improve the design, validation, and testing of automotive radar systems, especially for determining performance in rare or dangerous corner cases.

In a video, VLSI Research’s Dan Hutcheson chats with Tom Caulfield of GlobalFoundries about three megatrends in the semiconductor industry and why it should work to create solutions that benefit humankind.

SEMI’s Nishita Rao chats with Andreas Breiter of McKinsey & Company about changes in the mobility and automotive markets and the new opportunities for sensors.

Plus, check out the blogs featured in the latest Auto, Security & Pervasive Computing and Test, Measurement & Analytics newsletters:

Editor in Chief Ed Sperling examines the challenges in achieving known good systems.

Synopsys’ Steve Pateras calls for a new approach for the development, operation, and maintenance of silicon-based systems.

FormFactor’s Peter Andrews explains why TestCell-generated noise is no longer a minor concern.

YieldHub’s Marie Ryan urges spending less time inputting yield management data and more time solving problems.

Rambus’ Scott Best delves into why chip disaggregation means a larger attack surface, increasing the chances of a successful Trojan or man-in-the-middle attack.

OneSpin Solutions’ Jörg Bormann questions the assumption that hardware interfaces must behave according to well-defined protocol rules.

Mentor’s Lee Harrison explains why on-chip sensors, chip identity, and security platforms will need chip-to-cloud infrastructure.

Arteris IP’s Kurt Shuler examines the applied research in AI taking place under the auspices of institutions like Samsung AIT and KAIST.

Flex Logix’s Geoff Tate warns to be aware of bottlenecks that can constrain theoretical peak performance.

Synopsys’ Joe Jarzombek discusses the need for standardized cybersecurity practices for both individual employees and teams with Synopsys CSO Deirdre Hanford.

Cadence’s Paul McLellan observes that distance between the transmitter and the receiver is an important consideration when choosing 56G and 112G SerDes.

Vtool’s Hagai Arbel explains how to gauge how complete a project is when the last 10% is the hardest part, in I’m Almost Done.