Blog Review: Oct. 19

FPGA design trends; silicon photonics; RISC history; adaptive headlights.


Siemens EDA’s Harry Foster examines trends related to various aspects of FPGA design and the growing design complexity associated with increasing number of embedded processor cores, asynchronous clock domains, and more safety features.

Synopsys’ Twan Korthorst and Kenneth Larsen take a broad look at silicon photonics, including the benefits of electronic integration, accelerating the development of photonic IC designs across markets, and why companies are interested in shifting to integrated lasers.

Cadence’s Paul McLellan looks back on the early history of RISC processors and the development of the IBM 801, which was originally designed to run a telephone switch.

Ansys’ Emmanuel Follin checks out how adaptive headlights adjust their beam pattern in response to driving conditions and some of the challenges and designing and testing them.

In a podcast, Arm’s Geof Wheelwright chats with Mark Hambleton about what ‘software defined’ means and the benefits it could have for developers, consumers, and the wider tech industry.

Riscure’s Jasper van Woudenberg checks out an effort to determine whether Starlink user terminals are resistant to fault injection attacks.

Renesas’ Roger Wendelken notes the importance of educating customers on the need for security, how to manage security layers, and understanding the limitations of a device.

In a blog for SEMI, ASM International’s John Golightly argues that companies in the semiconductor value chain should take part in efforts to speed sustainability innovations, develop and adopt standards and processes, demystify current schemes for calculating carbon emissions reductions, and share ways to meet carbon emissions disclosure requirements.

Plus, check out the blogs featured in the latest Low Power-High Performance newsletter:

Cadence’s Tom Beckley examines what is needed to succeed with system-in-package.

Synopsys’ Manoz Palaparthi shows how to ferret out the root causes of early full-chip LVS faster.

Siemens’ Janet Attar presents a case study in low-power and high-performance AI processors.

Arm’s Jack Melling shows how a lack of hardware and firmware standardization between SoCs can hinder the deployment of edge computing applications.

Keysight’s Don Dingee finds that workflows are changing, and design can no longer be an isolated activity.

Cycuity’s Jim Robinson puts forward four levels to assess current capabilities and take steps towards end-to-end hardware security verification.

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