What Is The Definition Of Design For Context?

EDA industry pundits and bloggers are latching onto a new term: design for context. So far, it has eluded a crisp yet complete definition. It’s one of those ideas that if you ask ten people about it, you get ten different answers – some better than others. Ed Sperling wryly observed this in his recent panel discussions about the topic: “Even my questions are getting longer.” When Keysight listens to folks discussing design for context, they hear two broad storylines.

First, design can no longer be an isolated activity, and context is driving a much-needed transformation. Workflows are changing, with more collaboration within design teams and between design teams and ecosystem partners. Hierarchical design strategies provide visibility into context from components to end systems. Tighter integration, up to acquiring key players where it makes sense, offers companies better control over context.

Next comes a wide range of factors determining the details of a design. These influences are calling some long-held assumptions about semiconductor design into question. Busted norms cascade into shifting contexts with considerations like the following:

• Domain-specific. Any given chip probably will be used differently in different designs or by designers with varied experiences and preferences. Ed puts it this way: what works in an automobile won’t be the same as what works in a smartphone, a smart refrigerator, a streaming stick, or an IoT sensor. In a surprising twist, as complexity rises, the datasheet as we know it is not helping designers make chips work in each context.
• Regionally varied. Requirements and regulations differ between the US, Europe, and Asia, and even from country to country, especially in areas like security and privacy. Locales present vast environmental challenges in temperature and humidity, topography, wind loading, population density, and RF spectrum availability and interference. The upshot is a design can stop working when placed in unforeseen adverse conditions.
• Process-driven. Advanced semiconductor processes measured in single-digit nanometers are susceptible to many physical effects stepping out of the background. These include power, heat, noise, radiation, vibration, aging, packaging, pinouts, and more. And these effects now work in combinations defying separate analyses, making simplistic tradeoffs irrelevant. There’s also a realization that off-the-shelf parts aren’t optimum, pushing designers toward customization.
• Volume sensitive. The more any design tailors toward one use case, the smaller the unit volumes. Lower volumes mean less economic feasibility. Manufacturers look for higher volumes, but that’s not necessarily good for designers trying to differentiate solutions. Can chip makers afford to characterize parts for each domain, much less each context? Can they afford not to? Wrong answers put design wins in jeopardy.

Design for context also depends on where one sits in the supply chain. The perspective changes moving from chips to modules, subsystems, systems, and systems-of-systems. Information must flow between participants easier than it has in the past. More knowledge about real-world system outcomes can impact chip makers’ upstream optimization choices.

Example of hierarchical design workflow in an ADAS context.

Note that this workflow also includes testing in context and the concept of silicon life cycle management. For mission-critical applications like satellite communications, virtual testing in context during the design phase can uncover issues that may be prohibitively expensive to reproduce in the real world but have serious consequences. For other applications like system power distribution, effects of packaging, layout, and parasitics combine, so analysis must model the entire context accurately.

Getting all this knowledge onto a designer’s desk is what Keysight EDA teams work on daily. Creating tools and workflows supporting design for context hinges on answering two questions:

• What if designers could pull everything affecting system outcomes back from the physical world and put it in one virtual space created for executing engineering tasks?
• And, with complex system exploration in physical space cost prohibitive, how can the same virtual space accurately portray what happens when a design drops into a different context?

Keysight has a unique opportunity few other vendors have: combining world-class test & measurement tools with cutting-edge EDA tools for higher fidelity modeling and simulation. The approach combines authentic signals, performance measurements, design intent and parasitic behavior, environmental parameters including kinematics, cross-domain effects, and more. It can also fix datasheet insufficiency, replacing them with something better.

Want to see what more companies are saying about design for context? See Ed Sperling’s article “IC Architectures Shift as OEMs Narrow Their Focus.” While not defining the term precisely, Ed and his interviewees, including Keysight’s Niels Faché, discuss how context affects chip and system design tradeoffs. His closing statement: “… engineers in every discipline will need to start looking beyond their area of focus to systems of chips and systems of systems.” It’s a big challenge – with more insights ahead.